| PARAMETER | SYMBOL | CONDITIONS | MIN | TYP | MAX | UNITS |
|---|---|---|---|---|---|---|
| MCU POWER SUPPLIES / OPERATION | ||||||
| Supply Voltage | VDD | 1.71 | 1.8 | 3.63 | V | |
| Power-Fail Reset Voltage | VRST | Monitors VDD | 1.63 | 1.71 | V | |
| Power-On Reset Voltage | VPOR | Monitors VDD | 1.4 | V | ||
| MCU POWER SUPPLIES / SINGLE-SUPPLY OPERATION (VDD ONLY) | ||||||
| VDD Fixed Current, Deep Sleep Mode | IDD_FDSL | Standby state with full data retention and 96kB SRAM retained | 4.2 | μA | ||
| AFE POWER SUPPLIES | ||||||
| Power Supply Voltage | VDD_AFE | 1.7 | 1.8 | 2.0 | V | |
| LED Supply Voltage | VLED | 3.1 | 5.5 | V | ||
| VDD_AFE Current in Shutdown | TA = +25°C | 0.6 | 3.0 | μA | ||
| VLED Current in Shutdown | TA = +25°C | 1 | μA | |||
| MCU / GENERAL-PURPOSE I/O | ||||||
| Input-Low Voltage for RSTN, GPIO P0.1, P0.2, P0.3 | VIL_GPIO | 0.3 × VDD | V | |||
| Input-High Voltage for RSTN, GPIO P0.1, P0.2, P0.3 | VIH_GPIO | 0.7 × VDD | V | |||
| Output-Low Voltage for GPIO P0.0, P0.1 | VOL_GPIO | IOL = 2mA | 0.2 | 0.4 | V | |
| Output-High Voltage for GPIO P0.0, P0.1 | VOH_GPIO | IOH = 2mA | VDD - 0.4 | V | ||
| Input Hysteresis (Schmitt) | VIHYS | 300 | mV | |||
| Input/Output Pin Capacitance for All Pins | CIO | 4 | pF | |||
| Input Leakage Current Low | IIL | -500 | +500 | nA | ||
| Input Leakage Current High | IIH | -500 | +500 | nA | ||
| Input Pullup Resistor to RSTN | RPU_VDD | Pullup to VDD = 1.62V | 22 | kΩ | ||
| Pullup to VDD = 3.6V | 10.5 | |||||
| Input Pullup Resistor for All GPIO P0.x | RPU | Pullup to VDD = 1.62V | 22 | kΩ | ||
| Pullup to VDD = 3.63V | 10.5 | |||||
| Input Pulldown Resistor for All GPIO P0.x | RPD | Pulldown to VSS, VDD = 1.62V | 20 | kΩ | ||
| MCU / FLASH MEMORY | ||||||
| Flash Erase Time | tM_ERASE | Mass erase | 30 | ms | ||
| tP_ERASE | Page erase | 30 | ||||
| Flash Programming Time Per Word | tPROG | 60 | μs | |||
| Flash Endurance | 10 | kCYCLES | ||||
| Data Retention | tRET | TA = +85°C | 10 | YEARS | ||
| MCU / IO BUSES / SPI / MASTER MODE | ||||||
| Input-Low Voltage for GPIO SPI P0.4 | VIL_SPI | VSS | 0.3 x VDD | V | ||
| Input-High Voltage for GPIO SPI P0.4 | VIH_SPI | 0.7 x VDD | VDD | V | ||
| Output-Low Voltage for GPIO SPI P0.5, P0.6 | VOL_SPI | IOL = 2mA | 0.4 | V | ||
| Output-High Voltage for GPIO SPI P0.5, P0.6 | VOH_SPI | IOH = 2mA | VDD - 0.4 | V | ||
| SPI Master Operating Frequency | fMCK | 48 | MHz | |||
| SPI Master SCLK Period | tMCK | 1/fMCK | ns | |||
| SCLK Output Pulse-Width High/Low | tMCH, tMCL | tMCK/2 | ns | |||
| MOSI Output Hold Time After SCLK Sample Edge | tMOH | tMCK/2 | ns | |||
| MOSI Output Valid to Sample Edge | tMOV | tMCK/2 | ns | |||
| MISO Input Valid to SCLK Sample Edge Setup | tMIS | 5 | ns | |||
| MISO Input to SCLK Sample Edge Hold | tMIH | tMCK/2 | ns | |||
| MCU / IO BUSES / I2C / FAST MODE | ||||||
| Input-Low Level Voltage for GPIO I2C P0.8, P0.9 | VIL_I2C | 0.3 x VDD | V | |||
| Input-High Level Voltage for GPIO I2C P0.8, P0.9 | VIH_I2C | 0.7 x VDD | V | |||
| Output-Low Level Voltage for GPIO I2C P0.8, P0.9 | VOL_I2C | IOL_I2C = 2mA | 0.2 | 0.4 | V | |
| Output-High Level Voltage for GPIO I2C P0.8, P0.9 | VOH_I2C | IOH_I2C = 2mA | VDD - 0.4 | V | ||
| Output Fall Time | tOF | From VOH_I2C(MIN) to VOL_I2C(MAX) | 150 | ns | ||
| Pulse Width Suppressed by Input Filter | tSP | 75 | ns | |||
| SCL Clock Frequency | fSCL | 0 | 400 | kHz | ||
| Low-Period SCL Clock | tLOW | 1.3 | μs | |||
| High-Time SCL Clock | tHIGH | 0.6 | μs | |||
| Setup Time for Repeated Start Condition | tSU_STA | 0.6 | μs | |||
| Hold Time for Repeated Start Condition | tHD_STA | 0.6 | μs | |||
| Data Setup Time | tSU_DAT | 125 | ns | |||
| Data Hold Time | tHD_DAT | 10 | ns | |||
| Rise Time for SDA and SCL | tR | 30 | ns | |||
| Fall Time for SDA and SCL | tF | 30 | ns | |||
| Setup Time for a Stop Condition | tSU_STO | 0.6 | μs | |||
| Bus-Free Time Between a Stop and Start Condition | tBUS | 1.3 | μs | |||
| Data Valid Time | tVD_DAT | 0.9 | μs | |||
| Data Valid Acknowledge Time | tVD_ACK | 0.9 | μs | |||
| AFE / READOUT CHANNEL | ||||||
| ADC Resolution | 19 | BITS | ||||
| Maximum ADC Full-Scale Input Current | 32.0 | μA | ||||
| Minimum ADC Integration Time | tINT | 14.8 | μs | |||
| Maximum ADC Integration Time | tINT | 117.3 | μs | |||
| Sample Rate Error | From nominal | ±2.5 | % | |||
| Maximum DC Ambient Light Input Range | ALR | 100 | μA | |||
| AC Ambient Light Rejection | AC_ALRR | IAMBIENT = 1μA DC with ±0.4μAP-P 120Hz sine wave | 70 | dB | ||
| DC Ambient Light Rejection | IAMBIENT modulated between 0μA and 30μA, ADC integration time = 117.3μs | 0.5 | nA | |||
| Dark Current Input Referred Noise | ADC integration time = 14.8μs | 262 | pARMS | |||
| ADC integration time = 117.3μs | 56 | pARMS | ||||
| Maximum Photodiode Input Capacitance | CPD | 65 | pF | |||
| VDD DC PSR | IAMBIENT = 0μA, VDD = 1.7V to 2.0V, TA = +25°C | -560 | -330 | +560 | LSB/V | |
| AFE / LED Driver | ||||||
| LED Current Resolution | 8 | BITS | ||||
| Full-Scale LED Current | ILED | Maximum configurable LED current | 114 | 124 | 132 | mA |
| Minimum Output Voltage | VOL | Full-scale LED current | 700 | mV | ||
| LED Driver DC PSR | VDD_AFE = 1.8V, VLEDx_DRV = 0.9V, VLED = 3.1V to 5.5V, ILED = 124mA, TA = +25°C | -1 | +400 | μA/V | ||
| VDD_AFE = 1.7V to 2.0V, TA = +25°C, ILED = 124mA | 150 | 1500 | ||||
| PHOTODIODE | ||||||
| Wavelength of Peak Sensitivity | 860 | nm | ||||
| Spectral Bandwidth Range | 420 to 1020 | nm | ||||
| Note 1: |
All devices are 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by Maxim Integrated’s bench or proprietary automated test equipment (ATE) characterization. |
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