Electrical Characteristics

Electrical Characteristics
(V_AVDD1 = V_DVDDIO = 1.8V, V_AVDD2 = V_AVDD3 = V_DVDD = 1.2V, V_MBVDD = 3.6V, GND = DGND = 0V, C_MBVDD = C_MICBIASn = 2.2µF, C_AVDD1 = C_{AVDD1_REG} = C_AVDD2 = C_AVDD3 = C_DVDD = 1µF, C_DVDDIO = C_MICBIAS2 = C_MICBIAS3 = 0.1µF, High-Performance Record and Playback Modes, Low-Noise Microphone Bias Mode, Z_LOAD = OPEN, f_LRCLK = 48kHz, f_{S_DF} = 192kHz, f_BCLK = 3.072MHz, f_{DMIC_CLK} = 3.072MHz, AC Measurement Bandwidth = 20Hz to 20kHz, T_A = -40°C to +85°C unless otherwise noted, Typical values at T_A = +25°C, Note 1)
PARAMETER	SYMBOL	CONDITIONS		MIN	TYP	MAX	UNITS
SYSTEM / POWER SUPPLIES
Power Supply Voltage Range	V_MBVDD			1.3	3.6	4.8	V
	V_AVDD1			1.71	1.8	1.95
	V_AVDD2			1.1	1.2	1.3
	V_AVDD3			1.1	1.2	1.3
	V_DVDDIO	1.8V digital interface mode		1.65	1.8	1.95
	V_DVDDIO	1.2V digital interface mode		1.1	1.2	1.3
	V_DVDD			1.1	1.2	1.3
AVDD1 Undervoltage Lockout Threshold		V_AVDD1 falling		1.24		1.46	V
AVDD2 Undervoltage Lockout Threshold		V_AVDD2 falling		0.85		1.01	V
AVDD3 Undervoltage Lockout Threshold		V_AVDD3 falling		0.85		1.01	V
DVDD Undervoltage Lockout Threshold		V_DVDD falling		0.85		1.01	V
DVDDIO Undervoltage Lockout Threshold		V_DVDDIO falling		0.85		1.01	V
AVDD1 UVLO Hysteresis		(Note 2)		90			mV
AVDD2 UVLO Hysteresis		(Note 2)		24			mV
AVDD3 UVLO Hysteresis		(Note 2)		24			mV
DVDD UVLO Hysteresis		(Note 2)		24			mV
DVDDIO UVLO Hysteresis		(Note 2)		24			mV
SYSTEM / QUIESCENT POWER CONSUMPTION / AUDIO PLAYBACK
Quiescent Supply Current	I_{Q_DVDD}	High-performance mode, playback at 48kHz, audio playback silent (dither disabled), P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			1.6	2.2	mA
	I_{Q_DVDD}	High-performance mode, playback at 48kHz, audio playback silent, clock and data monitor enable, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			1.7
	I_{Q_DVDDIO}	High-performance mode, playback at 48kHz, audio playback silent, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			0.01
	I_{Q_AVDD1}				0.03	0.06
	I_{Q_AVDD2}				0.45	0.75
	I_{Q_AVDD3}				0.012	0.04
	I_{Q_AVDD2}	Low-power mode, playback at 48kHz, audio playback silent, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			0.37
SYSTEM / QUIESCENT POWER CONSUMPTION / AUDIO PLAYBACK WITH LOW-LATENCY DIGITAL FILTER CHANNELS
Quiescent Supply Current	I_{Q_DVDD}	High-performance playback and record, playback at 48kHz, stereo AMIC to low-latency digital filter channels at 192kHz, hybrid ANC tuning profile with typical number of biquad filter bands active (8 bands in DF1/DF2 and 6 bands in PBC), audio playback silent (dither disabled), AMIC record silent, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			5.16	7.6	mA
	I_{Q_DVDDIO}				0.013
	I_{Q_AVDD1}				2.18	3.6
	I_{Q_AVDD2}				0.45	0.75
	I_{Q_AVDD3}				0.012	0.04
	I_{Q_AVDD1}	Low-power playback and record, playback at 48kHz, stereo AMIC to low-latency digital filter channels at 192kHz, hybrid ANC tuning profile with typical number of biquad filter bands active (8 bands in DF1/DF2 and 6 bands in PBC), audio playback silent (dither disabled), AMIC record silent, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			1.7
	I_{Q_AVDD2}				0.37
SYSTEM / QUIESCENT POWER CONSUMPTION / AUDIO PLAYBACK WITH STEREO RECORD
Quiescent Supply Current	I_{Q_DVDD}	High-performance record and playback modes, playback and stereo AMIC record at 48kHz, audio playback silent (dither disabled), record silent, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			2.85	4	mA
	I_{Q_DVDDIO}				0.013
	I_{Q_AVDD1}				2.18	3.6
	I_{Q_AVDD2}				0.45	0.75
	I_{Q_AVDD3}				0.012	0.04
	I_{Q_AVDD1}	Low-power record and playback modes, playback and stereo AMIC record at 48kHz, audio playback silent (dither disabled), record silent, P_OUT = 0mW, Z_LOAD = 32Ω + 33µH			1.7
	I_{Q_AVDD2}				0.37
SYSTEM / SOFTWARE SHUTDOWN POWER CONSUMPTION
Software Shutdown Supply Current	I_{MBVDD_SW}	V_MBVDD = 3.6V, software shutdown state, digital interfaces not driven, T_A = +25°C			0.08	3	µA
	I_{DVDDIO_SW}	V_DVDDIO = 1.8V, software shutdown state, digital interfaces not driven, T_A = +25°C			0.18	3
	I_{DVDD_SW}	V_DVDD = 1.2V, software shutdown state, digital interfaces not driven, T_A = +25°C			0.55	2
	I_{AVDD1_SW}	V_AVDD1 = 1.8V, software shutdown state, digital interfaces not driven, T_A = +25°C			1	3
	I_{AVDD2_SW}	V_AVDD2 = 1.2V, software shutdown state, digital interfaces not driven, T_A = +25°C			0.05	2
	I_{AVDD3_SW}	V_AVDD3 = 1.2V, software shutdown state, digital interfaces not driven, T_A = +25°C			0.09	2
SYSTEM / HARDWARE SHUTDOWN POWER CONSUMPTION
Hardware Shutdown Supply Current	I_{MBVDD_HW}	V_MBVDD = 3.6V, hardware shutdown state, digital audio interfaces not driven, T_A = +25°C			0.01	3	µA
	I_{DVDDIO_HW}	V_DVDDIO = 1.8V, hardware shutdown state, digital audio interfaces not driven, T_A = +25°C			0.01	3
	I_{DVDD_HW}	V_DVDD = 1.2V, hardware shutdown state, digital audio interfaces not driven, T_A = +25°C			0.55	2
	I_{AVDD1_HW}	V_AVDD1 = 1.8V, hardware shutdown state, digital audio interfaces not driven, T_A = +25°C			0.1	3
	I_{AVDD2_HW}	V_AVDD2 = 1.2V, hardware shutdown state, digital audio interfaces not driven, T_A = +25°C			0.05	2
	I_{AVDD3_HW}	V_AVDD3 = 1.2V, hardware shutdown state, digital audio interfaces not driven, T_A = +25°C			0.09	2
ENABLE / DISABLE TIMING
Hardware Enable Time	t_{HW_EN}	Transition time from hardware shutdown to software shutdown (Initialization Done interrupt) (Note 3)				2.5	ms
Hardware Disable Assert Time	t_{HW_DIS}	Minimum time HW_EN must be asserted low to ensure the device transitions to hardware shutdown (Note 3)		1			µs
Audio Turn-On Time	t_ON	Transition time from software shutdown to audio record and playback with digital filter channels active (Record and Playback Power-Up Done interrupts), volume ramping disabled	AMIC_CT_SEL = 0x0		3.7	4	ms
			AMIC_CT_SEL = 0x1		5.2	6
			AMIC_CT_SEL = 0x2		9.2	10
			AMIC_CT_SEL = 0x3		17.2	18
Audio Turn-On Time with Ramping	t_ON	Transition time from software shutdown to audio playback with digital filter channels disabled or muted (Playback Power-Up Done interrupt), playback volume ramping enabled at 4ms, AMIC_CT_SEL = 0x1			9.2	10	ms
Audio Turn-On Time for Dynamic Record Channel Enable	t_{ON_REC}	Device already in audio state, time from dynamically setting RECn_PCM_EN high until record channel active with valid data (Note 4)			1.3	2	ms
Audio Turn-Off Time	t_OFF	Transition time from audio record and/or playback with digital filter channels active into software shutdown (Power Down Done interrupt), volume ramping disabled			0.01	0.1	ms
Audio Turn-Off Time with Ramping	t_OFF	Transition time from audio record and/or playback with digital filter channels muted or disabled into software shutdown (Power Down Done interrupt), playback volume ramping enabled at 4ms			4.4	4.5	ms
ANALOG MICROPHONE INPUT TO ADC RECORD
Dynamic Range	DR	PGA gain = +6dB, single-ended or differential input, AMICn_PGA_RIN = 1, DRE enabled (Note 5)			104		dB
		PGA gain = +3dB, single-ended or differential input, AMICn_PGA_RIN = 0, DRE enabled (Note 5)			104
		PGA gain = +3dB, single-ended or differential input, AMICn_PGA_RIN = 1, DRE enabled (Note 5)			107
		PGA gain = 0dB, differential input, AMICn_PGA_RIN = 1, DRE enabled (Note 5)			110
		PGA gain = -3dB, differential input, AMICn_PGA_RIN = 1, DRE enabled (Note 5)			113
Total Harmonic Distortion + Noise	THD+N	PGA gain = +6dB, single-ended or differential input, f_IN = 1kHz, -6dBFS digital output, high-performance mode			-82	-75	dB
		PGA gain = +6dB, single-ended or differential input, f_IN = 1kHz, -6dBFS digital output, low-power mode			-80
		PGA gain = +0dB, differential input, f_IN = 1kHz, -6dBFS digital output, high performance mode (Note 2)			-82	-75
		PGA gain = +21dB, single-ended or differential input, f_IN = 1kHz, -6dBFS digital output, high performance mode			-78
Crosstalk		Between any pair of record channels, f_IN = 1kHz			-120		dB
Common Mode Rejection Ratio	CMRR	PGA Gain = 0dB, V_{IN_CM} = 100mV_PP, f_{IN_CM} = 217Hz			75		dB
ANALOG MICROPHONE INPUT TO ADC RECORD / PROGRAMMABLE GAIN AMPLIFIER (PGA)
Full-Scale Input Voltage	V_FS	PGA gain = +6dB, single-ended or differential input, THD+N ≤ -40dB			0.5		V_RMS
		PGA gain = +3dB, single-ended or differential input, THD+N ≤ -40dB			0.707
		PGA gain = 0dB, differential input, THD+N ≤ -40dB			1
		PGA gain = -3dB, differential input, THD+N ≤ -40dB			1.414
Disabled AMIC Preamp Input Resistance	R_{IN_PA_OFF}	Measured single-ended to ground, device in software shutdown or AMIC preamp disabled, AMICn_PGA_HIZ_EN = 1 (Note 5)		100	200		kΩ
Active AMIC Preamp Input Resistance	R_{IN_PA_ON}	Measured single-ended to ground, device in active state and AMIC preamp enabled, AMICn_PGA_RIN = 0 (Note 5)		28	35		kΩ
Active AMIC Preamp Input Resistance	R_{IN_PA_ON}	Measured single-ended to ground, device in active state and AMIC preamp enabled, AMICn_PGA_RIN = 1 (Note 5)		8	10		kΩ
Minimum PGA Gain		AMICn_PGA_GAIN = 0x0 (Note 5)		-6.5	-6	-5.5	dB
Maximum PGA Gain		AMICn_PGA_GAIN = 0x9 (Note 5)		20.5	21	21.5	dB
ANALOG MICROPHONE INPUT TO ADC RECORD / POWER SUPPLY REJECTION
Power Supply Rejection Ratio	PSRR	V_AVDD1 = 1.71V to 1.95V			90		dB
		V_RIPPLE = 100mV_P-P on AVDD1	f_RIPPLE = 217Hz		110
			f_RIPPLE = 1kHz		110
			f_RIPPLE = 20kHz		95
		V_AVDD2 = 1.71V to 1.95V			95
		V_RIPPLE = 100mV_P-P on AVDD2	f_RIPPLE = 217Hz		95
			f_RIPPLE = 1kHz		95
			f_RIPPLE = 20kHz		90
MICROPHONE BIAS GENERATOR
Output Voltage	V_MICBIAS	AMIC_BIAS_SEL = 0x0		1.1	1.2	1.3	V
		AMIC_BIAS_SEL = 0x1 (Note 2)		1.4	1.5	1.6
		AMIC_BIAS_SEL = 0x2		1.7	1.8	1.9
		AMIC_BIAS_SEL = 0x3 (Note 2)		1.9	2	2.1
		AMIC_BIAS_SEL = 0x4 (Note 2)		2.15	2.25	2.35
		AMIC_BIAS_SEL = 0x5		2.4	2.5	2.6
		AMIC_BIAS_SEL = 0x6 (Note 2)		2.65	2.75	2.85
		AMIC_BIAS_SEL = 0x7 (Note 2)		2.9	3	3.1
Dropout Voltage		V_MBVDD - V_MICBIASn (Note 2)		200			mV
Enable Charge Time		V_MICBIASn = 1.8V (90% charged), C_MICBIAS1 = 2.2µF, three microphones connected (0.1µF each)			15		µs
Disable Discharge Time		V_MICBIASn = 3V, microphone bias disabled (90% discharged), C_MICBIAS1 = 2.2µF, three microphones connected (0.1µF each)			7		ms
Transition Time		V_MICBIASn changed from 1.2V to 3V (90% transition), C_MICBIAS1 = 2.2µF, three microphones connected (0.1µF each)			15		µs
		V_MICBIASn changed from 3V to 1.2V (90% transition), C_MICBIAS1 = 2.2µF, three microphones connected (0.1µF each) (Note 6)	Low-noise mode		24		ms
			Low-power mode		51		ms
MICROPHONE BIAS GENERATOR / QUIESCENT CURRENT
MBVDD Quiescent Current	I_MBVDD	No microphones connected	V_MICBIASn = 1.2V, low-power mode		22		µA
			V_MICBIASn = 1.8V, low-noise mode		74
			V_MICBIASn = 1.8V, low-power mode		33
			V_MICBIASn = 2.5V, low-power mode		47
AVDD1 Additive Quiescent Current	I_AVDD1	No microphones connected, additional current when enabled in software shutdown	Low-power mode		70		µA
		No microphones connected, additional current when enabled in the audio state	Low-noise mode		65
			Low-power mode		50
AVDD2 Additive Quiescent Current	I_AVDD2	No microphones connected, additional current when enabled in software shutdown			40		µA
MICROPHONE BIAS GENERATOR / OUTPUT NOISE
Integrated Output Noise		A-weighted, f = 20Hz to 20kHz, V_MICBIASn = 1.2V	Low-noise mode		3.4		µV_RMS
		A-weighted, f = 20Hz to 20kHz, V_MICBIASn = 1.2V	Low-power mode		4.1
		A-weighted, f = 20Hz to 20kHz, V_MICBIASn = 1.8V	Low-noise mode		5.2
		A-weighted, f = 20Hz to 20kHz, V_MICBIASn = 1.8V	Low-power mode		6.7
		A-weighted, f = 20Hz to 20kHz, V_MICBIASn = 2.5V	Low-noise mode		7.6
		A-weighted, f = 20Hz to 20kHz, V_MICBIASn = 2.5V	Low-power mode		9.6
MICROPHONE BIAS GENERATOR / OUTPUTS CHARACTERISTICS
Output Current Drive	I_MICBIAS	Any combination of MICBIAS1, MICBIAS2, and MICBIAS3 enabled, up to three analog microphones connected total (Note 2)		3			mA
Load Regulation		MICBIAS1 output	V_MICBIAS1 = 1.8V, 0mA ≤ I_MICBIAS ≤ 1mA (Note 2)		±0.5	±3.5	mV
		MICBIAS1 output	V_MICBIAS1 = 1.8V, 1mA < I_MICBIAS ≤ 3mA (Note 2)		±1.1	±6.5
		MICBIAS2 or MICBIAS3 output	V_MICBIASn = 1.8V, 0mA ≤ I_MICBIAS ≤ 1mA (Note 2)		±1.5	±4.5
		MICBIAS2 or MICBIAS3 output	V_MICBIASn = 1.8V, 1mA ≤ I_MICBIAS ≤ 3mA (Note 2)		±3.1	±9
Line Regulation		V_MICBIASn = 1.8V, V_MBVDD = 2V to 4.8V (Note 2)			±0.1		mV
MICROPHONE BIAS GENERATOR / POWER SUPPLY REJECTION
Power Supply Rejection Ratio	PSRR	MBVDD DC PSRR	V_MICBIASn = 1.2V, V_MBVDD = 1.4V to 4.8V		90		dB
		MBVDD DC PSRR	V_MICBIASn = 1.8V, V_MBVDD = 2V to 4.8V		90
		V_RIPPLE = 100mV_P-P on MBVDD, V_MICBIASn = 1.8V, I_LOAD < 3mA	f_RIPPLE = 217Hz		90
			f_RIPPLE = 1kHz		90
			f_RIPPLE = 20kHz		80
		AVDD1 DC PSRR	V_MICBIASn = 1.8V, V_AVDD1 = 1.71V to 1.95V		80
		V_RIPPLE = 100mV_P-P on AVDD1, V_MICBIASn = 1.8V, I_LOAD < 3mA	f_RIPPLE = 217Hz		90
			f_RIPPLE = 1kHz		90
			f_RIPPLE = 20kHz		80
		AVDD2 DC PSRR	V_MICBIASn = 1.8V, V_AVDD2 = 1.1V to 1.3V		60
		V_RIPPLE = 100mV_P-P on AVDD2, V_MICBIASn = 1.8V, I_LOAD < 3mA	f_RIPPLE = 217Hz		75
			f_RIPPLE = 1kHz		75
			f_RIPPLE = 20kHz		75
RECORD CHANNEL DIGITAL CHARACTERISTICS / DIGITAL VOLUME CONTROL (Channels 1, 2, and 3)
Maximum Digital Volume		REC_VOL = 0x00			0		dB
Minimum Digital Volume		REC_VOL = 0x7F			-63.5		dB
Digital Volume Control Step Size					0.5		dB
RECORD CHANNEL DIGITAL CHARACTERISTICS / DIGITAL GAIN CONTROL (Channels 1, 3, and 3)
Minimum Digital Gain		REC_GAIN = 0x00			0		dB
Maximum Digital Gain		REC_GAIN = 0x1F			+31		dB
Digital Gain Control Step Size					1		dB
RECORD CHANNEL DIGITAL CHARACTERISTICS / DIGITAL HIGH PASS FILTER CHARACTERISTICS (Channels 1, 2, 3, Note 7)
DC Attenuation				80			dB
DC Blocking Cutoff Frequency		Scales with sample rate	f_{S_REC} = 48kHz, RECn_DCBLK = 0x0		1.872		Hz
			f_{S_REC} = 8kHz, RECn_DCBLK = 0x0		0.312
			f_{S_REC} = 48kHz, RECn_DCBLK = 0x1		14.976
			f_{S_REC} = 8kHz, RECn_DCBLK = 0x1		2.496
RECORD CHANNEL DIGITAL CHARACTERISTICS / DIGITAL FILTER CHARACTERISTICS (Note 7)
Nominal Sample Rates	f_{S_REC}			8		48	kHz
Passband Cutoff	f_PLP	Ripple < δ_P		0.460 x f_S			Hz
Passband Cutoff		Droop < -3dB		0.471 x f_S			Hz
Passband Ripple	δ_P	f_IN < f_PLP, referenced to signal level at 1kHz		-0.1		+0.1	dB
Passband Matching		f_IN < f_PLP, record channel 4 output to playback amplifier output		-0.1		+0.1	dB
Stopband Cutoff	f_SLP	Attenuation > δ_S				0.519 x f_S	Hz
Stopband Attenuation	δ_S	f_IN > f_SLP		-70			dB
RECORD CHANNEL DIGITAL CHARACTERISTICS / RECORD CHANNEL GROUP DELAY
Group Delay		f_IN = 1kHz, f_S = 8kHz, AMIC input to PCM interface data output			875		µs
Group Delay		f_IN = 1kHz, f_S = 48kHz, AMIC input to PCM interface data output			192		µs
Record Channel Group Delay Matching		f_IN = 1kHz, matched input type (AMIC or DMIC), microphone to PCM interface data output channels enabled synchronously	Maximum difference in channel-to-channel matching for record channels 1/2/3		1.3		µs
			Maximum difference in device-to-device matching for record channels 1/2/3		1.3
		f_IN = 1kHz, f_{S_REC} = 48kHz, matched input type (AMIC or DMIC), microphone to PCM interface data output channels enabled synchronously	Typical offset in matching from playback monitor channel (record 4) to record channels 1/2/3		20
		f_IN = 1kHz, matched input type (AMIC or DMIC), microphone to PCM interface data output channels enabled synchronously	Maximum difference (plus offset) in matching from playback monitor channel (record 4) to record channels 1/2/3		1.3
LOW-LATENCY DIGITAL FILTER CHANNEL 1 AND 2 CHARACTERISTICS (DF1 and DF2) / Low-Latency Digital Filter Channel Sample RatE
Channel Sample Rate	f_{S_DSP}	Playback sample rate is a 48kHz timebase	DSP_SR = 0x0		96		kHz
			DSP_SR = 0x1		192
			DSP_SR = 0x2		384
LOW-LATENCY DIGITAL FILTER CHANNEL 1 AND 2 CHARACTERISTICS (DF1 and DF2) / Low-Latency Digital Filter Channel Volume ControL
Maximum Digital Volume		DF1_VOL_BKn or DF2_VOL_BKn = 0x00			0		dB
Minimum Digital Volume		DF1_VOL_BKn or DF2_VOL_BKn = 0x3F			-31.5		dB
Digital Volume Step Size					0.5		dB
Digital Mute Attenuation		Digital filter channel active			100		dB
LOW-LATENCY DIGITAL FILTER CHANNEL 1 AND 2 CHARACTERISTICS (DF1 and DF2) / Low-Latency Digital Filter Channel Gain ControL
Minimum Digital Gain		DF1_GAIN_BKn or DF2_GAIN_BKn = 0x7			+42		dB
Maximum Digital Gain		DF1_GAIN_BKn or DF2_GAIN_BKn = 0x0			0		dB
Digital Gain Step Size					6		dB
LOW-LATENCY DIGITAL FILTER CHANNEL 1 AND 2 CHARACTERISTICS (DF1 and DF2) / Low-Latency Digital Filter Channel High-Pass Filter Characteristics (Note 7)
DC Attenuation				80			dB
DC Blocking Cutoff Frequency		Sample rate is 192kHz or 384kHz (DSP_SR)	DFn_DCBLK = 0x0		1.872		Hz
			DFn_DCBLK = 0x1		7.488
			DFn_DCBLK = 0x2		14.976
			DFn_DCBLK = 0x3		29.952
		Sample rate is 96kHz (DSP_SR)	DFn_DCBLK = 0x0		3.744
			DFn_DCBLK = 0x1		14.976
			DFn_DCBLK = 0x2		29.952
			DFn_DCBLK = 0x3		59.904
LOW-LATENCY DIGITAL FILTER CHANNEL 1 AND 2 CHARACTERISTICS (DF1 and DF2) / Low-Latency Digital Filter Channel Elliptical Ultra-Sound Filter Characteristics (Note 7)
Coefficient Width		Coefficient data format is 2.22 (2 integer bits and 22 decimal bits)			24		Bits
Passband Cutoff Frequency	f_PLP	Ripple < δ_P	DSP_SR = 0x0, sample rate = 96kHz	5		50	kHz
			DSP_SR = 0x1, sample rate = 192kHz	5		50
			DSP_SR = 0x2, sample rate = 384kHz	5		42
Stopband Cutoff Frequency	f_SLP	Attenuation > δ_S	DSP_SR = 0x0, sample rate = 96kHz	10		60	kHz
			DSP_SR = 0x1, sample rate = 192kHz	10		60
			DSP_SR = 0x2, sample rate = 384kHz	10		45
Transition Bandwidth		DSP_SR = 0x0, sample rate = 96kHz		5			kHz
		DSP_SR = 0x1, sample rate = 192kHz		3
		DSP_SR = 0x2, sample rate = 384kHz		2
Passband Ripple	δ_P	f_IN < f_PLP, referenced to signal level at 1kHz		±0.1			dB
Stopband Attenuation	δ_S	f_IN > f_SLP				60	dB
LOW-LATENCY DIGITAL FILTER CHANNEL 1 AND 2 CHARACTERISTICS (DF1 and DF2) / Low-Latency Digital Filter Channel Group DelaY
MIC Input to Amplifier Output Loop Group Delay		f_IN = 1kHz, measured from microphone input to headphone amplifier output, biquad bands enabled in pass-through, volume ramping enabled	AMIC input, sample rate = 96kHz		89		µs
			AMIC input, sample rate = 192kHz		45
			AMIC input, sample rate = 384kHz		35
			DMIC input, sample rate = 192kHz, DMIC sample rate = 3.072MHz		44
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / DIGITAL VOLUME CONTROLS
Maximum Digital Volume		Playback channel	PB_VOL = 0x0		0		dB
Minimum Digital Volume		Playback channel	PB_VOL = 0x7F		-63.5		dB
Maximum Digital Volume		Playback compensation channel	PBC_VOL_BKA or PBC_VOL_BKB = 0x00		0		dB
Minimum Digital Volume		Playback compensation channel	PBC_VOL_BKA or PBC_VOL_BKB = 0x3F		-31.5		dB
Digital Volume Control Step Size					0.5		dB
Digital Mute Attenuation		Digital audio interface active			100		dB
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / DIGITAL GAIN CORRECTION
Minimum Digital Gain		PB_GAIN = 0x00			-6		dB
Maximum Digital Gain		PB_GAIN = 0x30			+6		dB
Digital Gain Control Step Size					0.25		dB
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / DIGITAL GAIN CONTROL
Minimum Digital Gain		PBC_GAIN_BKA or PBC_GAIN_BKB = 0x7			+42		dB
Maximum Digital Gain		PBC_GAIN_BKA or PBC_GAIN_BKB = 0x0			0		dB
Digital Gain Step Size					6		dB
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / DIGITAL HIGH PASS FILTER CHARACTERISTICS (Note 7)
DC Attenuation				80			dB
DC Blocking Cutoff Frequency		Scales with sample rate up to 48kHz	f_S = 48kHz, PB_DCBLK = 0x0		1.872		Hz
			f_S = 8kHz, PB_DCBLK = 0x0		0.312
			f_S = 48kHz, PB_DCBLK = 0x1		14.976
			f_S = 8kHz, PB_DCBLK = 0x1		2.496
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / DIGITAL FILTER CHARACTERISTICS (Sample Rate < 50kHz, Note 7)
Valid Sample Rate Settings				8		48	kHz
Passband Cutoff	f_PLP	Ripple < δ_P		0.454 x f_S			Hz
Passband Cutoff		Droop < -3dB		0.459 x f_S			Hz
Passband Ripple	δ_P	f_IN < f_PLP, referenced to signal level at 1kHz		-0.1		+0.1	dB
Stopband Cutoff	f_SLP	Attenuation > δ_S				0.49 x f_S	Hz
Stopband Attenuation	δ_S	f_IN > f_SLP		75			dB
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / DIGITAL FILTER CHARACTERISTICS (Sample Rate ≥ 50kHz, Note 7)
Valid Sample Rate Settings				88.2		192	kHz
Passband Cutoff	f_PLP	Ripple < δ_P, 50kHz ≤ f_S < 100kHz		0.227 x f_S			Hz
Passband Cutoff		Droop < -3dB, 50kHz ≤ f_S < 100kHz		0.314 x f_S			Hz
Passband Ripple	δ_P	f < f_PLP, referenced to signal level at 1kHz		-0.1		+0.1	dB
Stopband Cutoff	f_SLP	Attenuation < δ_S				0.49 x f_S	Hz
Stopband Attenuation	δ_S	f > f_SLP		80			dB
PLAYBACK CHANNEL DIGITAL CHARACTERISTICS / GROUP DELAY
Group Delay		f_IN = 1kHz, f_S = 8kHz, PCM interface data input to amplifier output			670		µs
		f_IN = 1kHz, f_S = 48kHz, PCM interface data input to amplifier output			130
		f_IN = 1kHz, f_S = 192kHz, PCM interface data input to amplifier output			34
Playback Channel Group Delay Matching		f_IN = 1kHz, f_{S_DSP} = 192kHz, PCM interface data input to amplifier output, maximum difference in device-to-device matching for playback channel			5.2		µs
BIQUAD FILTER CHARACTERISTICS
Coefficient Width		Coefficient data format is 2.22 (2 integer bits and 22 decimal bits)			24		Bits
Number of Bands		Playback equalizer			5		Bands
		Playback compensation filter channel			10
		Low-latency digital filter channel 1 and 2			12
Frequency Range	f₀	Low-pass filter corner frequency		0.5			kHz
		High-pass filter corner frequency		0.02
		Peaking filter center frequency		0.02
		Low-shelf filter midpoint frequency		0.02
		High-shelf filter midpoint frequency		0.02
Quality Factor	Q	Low-pass filter		0.2		5
		High-pass filter		0.2		5
		Peaking filter		0.2		5
		Low-shelf filter		0.2		5
		High-shelf filter		0.2		5
Gain Range	A	Peaking filter		-20		+20	dB
		Low-shelf filter		-20		+20
		High-shelf filter		-20		0
PLAYBACK OUTPUT AMPLIFIER
Full Scale Output Voltage	V_FS	Playback volume = 0dB		0.962	1	1.03	V_RMS
Full Scale Output Voltage	V_FS	Playback volume = -3dB, PB_AMP_MODE = 0x1 (Note 2)		0.683	0.707	0.727	V_RMS
Dynamic Range	DR	High-performance playback mode (Note 5)		109	114		dB
Dynamic Range	DR	Low-power playback mode (Notes 2 and 5)		106	111		dB
Output Noise		A-weighted, audio playback silent, high-performance mode (Note 2)			2	3.5	µV_RMS
Output Noise		A-weighted, audio playback silent, low-power mode (Note 2)			2.8	5	µV_RMS
Output Power	P_OUT	f_IN = 1kHz, playback volume = 0dB, R_LOAD = 32Ω, THD+N ≤ -40dB			31		mW
		f_IN = 1kHz, playback volume = 0dB, R_LOAD = 16Ω, THD+N ≤ -40dB			61
		f_IN = 1kHz, playback volume = -3dB, PB_AMP_MODE = 0x1, R_LOAD = 32Ω, THD+N ≤ -40dB			15
		f_IN = 1kHz, playback volume = -3dB, PB_AMP_MODE = 0x1, R_LOAD = 16Ω, THD+N ≤ -40dB			30
Total Harmonic Distortion + Noise	THD+N	f_IN = 1kHz, P_OUT = 20mW, R_LOAD = 32Ω, playback volume = 0dB			-75		dB
		f_IN = 1kHz, P_OUT = 31mW, R_LOAD = 32Ω, playback volume = 0dB (Note 2)			-65	-60
		f_IN = 1kHz, P_OUT = 10mW, R_LOAD = 32Ω, playback volume = -3dB, PB_AMP_MODE = 0x1			-76
Output Offset Voltage	V_OS				±0.1	±0.65	mV
Click-and-Pop Level	K_CP	Audio playback silent, amplifier enabled by software (Note 8)			-75		dBV
Click-and-Pop Level	K_CP	Audio playback silent, amplifier disabled by software (Note 8)			-75		dBV
Minimum Output Load Resistance		Differential between OUTP and OUTN			12.8		Ω
Minimum Output Load Capacitance		Differential between OUTP and OUTN			0		pF
Maximum Output Load Capacitance		Differential between OUTP and OUTN, playback high performance mode or playback low power mode with PB_AMP_LOAD_OP_BIAS = 0x1 (default)			50		pF
			R_LOAD ≤ 100Ω		75
		Differential between OUTP and OUTN, playback low power mode, PB_AMP_LOAD_OP_BIAS = 0x3			100
Maximum Output Load Inductance		Differential between OUTP and OUTN			75		μH
Amplifier OVC Auto Restart Time	t_{OVC_RETRY}	Time the amplifier output is disabled before being re-enabled when an overcurrent fault occurs, auto OVC recovery mode, AMIC_CT_SEL = 0x1, ramping disabled (ramp time added if enabled)			5.2		µs
EMI Margin to EN55022B		6" cable, Z_LOAD = 16Ω + 32µH, P_OUT = 10mW			-12		dB
PLAYBACK OUTPUT AMPLIFIER / INCREMENTAL EFFICIENCY
Playback Amplifier Incremental Efficiency		Z_LOAD = 32Ω + 32µH (Note 9)	P_OUT = 0.1mW	11.5	18		%
			P_OUT = 1mW	47.5	59
			P_OUT = 10mW		80
			PB_AMP_MODE = 0x1, P_OUT = 10mW		84
PLAYBACK OUTPUT AMPLIFIER / POWER SUPPLY REJECTION
AVDD1 Power Supply Rejection Ratio	PSRR	DC, V_AVDD1 = 1.71V to 1.95V			100		dB
		V_RIPPLE = 100mV_P-Pon AVDD1, f_RIPPLE = 217Hz			100
		V_RIPPLE = 50mV_P-Pon AVDD1, f_RIPPLE = 1kHz			100
		V_RIPPLE = 50mV_P-Pon AVDD1, f_RIPPLE = 20kHz			90
AVDD2 Power Supply Rejection Ratio	PSRR	DC, V_AVDD2 = 1.1V to 1.3V			90		dB
		V_RIPPLE = 50mV_P-Pon AVDD2, f_RIPPLE = 217Hz			95
		V_RIPPLE = 50mV_P-Pon AVDD2, f_RIPPLE = 1kHz			95
		V_RIPPLE = 50mV_P-Pon AVDD2, f_RIPPLE = 20kHz			85
AVDD3 Power Supply Rejection Ratio	PSRR	DC, V_AVDD3 = 1.1V to 1.3V			100		dB
		V_RIPPLE = 50mV_P-Pon AVDD3, f_RIPPLE = 217Hz			100
		V_RIPPLE = 50mV_P-Pon AVDD3, f_RIPPLE = 1kHz			100
		V_RIPPLE = 50mV_P-Pon AVDD3, f_RIPPLE = 20kHz			95
DIGITAL I/O / INPUT—BCLK, LRCLK, DIN, DMD1, DMD2, DMD3, HW_EN
Input Voltage High	V_IH			0.7 x V_DVDDIO			V
Input Voltage Low	V_IL					0.3 x V_DVDDIO	V
Input Leakage Current				-1		+1	µA
Input Hysteresis	V_HYS	(Note 2)		75			mV
Maximum Input Capacitance	C_IN				10		pF
Internal Pulldown Resistance	R_PD	BCLK, LRCLK			3		MΩ
DIGITAL I/O / INPUT—SDA, SCL, ADDR
Input Voltage High	V_IH			0.7 x V_DVDDIO			V
Input Voltage Low	V_IL					0.3 x V_DVDDIO	V
Input Leakage Current		T_A= +25°C, input high		-1		+1	µA
Input Hysteresis	V_HYS	(Note 2)		75			mV
Input Capacitance	C_IN				10		pF
DIGITAL I/O / OPEN-DRAIN OUTPUT—SDA, IRQ
Output Voltage Low	V_OL	I_SINK = 3mA				0.4	V
Output High Leakage Current	I_OH	T_A = +25°C		-1		+1	µA
DIGITAL I/O / PUSH-PULL OUTPUT—DOUT, DMC1, DMC2, DMC3, IRQ
Output Voltage High	V_OH	I_OH = 3mA		V_DVDDIO - 0.3			V
Output Voltage Low	V_OL	I_OL = 3mA				0.3	V
Output Current	I_OH	DOUT, DMC1, DMC2, DMC3, maximum drive mode			8		mA
		DOUT, DMC1, DMC2, DMC3, high drive mode			6
		DOUT, DMC1, DMC2, DMC3, standard drive mode			4
		DOUT, DMC1, DMC2, DMC3, reduced drive mode			2
PCM AUDIO INTERFACE TIMING
Nominal LRCLK Frequency Range Settings	f_LRCLK	All PCM interface operating modes		8		192	kHz
Nominal BCLK Frequency Range Settings	f_BCLK	I²S mode or left-justified mode		0.256		12.288	MHz
Nominal BCLK Frequency Range Settings	f_BCLK	TDM mode		0.256		24.576	MHz
BCLK Duty Cycle	DC_BCLK			45		55	%
BCLK Period	t_BCLK	I²S mode or left-justified mode		80			ns
BCLK Period	t_BCLK	TDM mode		40			ns
Maximum BCLK Input Low-Frequency Jitter		Maximum allowable jitter before a -20dBFS, 20kHz input has a 1dB reduction in THD+N, RMS jitter ≤ 40kHz			0.25		ns
Maximum BCLK Input High-Frequency Jitter		Maximum allowable jitter before a -60dBFS, 20kHz input has a 1dB reduction in THD+N, RMS jitter > 40kHz			1		ns
PCM AUDIO INTERFACE TIMING / PCM INTERFACE TIMING
LRCLK to BCLK Active Edge Setup Time	t_SYNCSET			4			ns
LRCLK to BCLK Active Edge Hold Time	t_SYNCHOLD			4			ns
DIN to BCLK Active Edge Setup Time	t_SETUP			4			ns
DIN to BCLK Active Edge Hold Time	t_HOLD			4			ns
DIN Frame Delay After LRCLK Edge		Measured in number of BCLK cycles, set by selected TDM mode		0		2	cycles
PCM AUDIO INTERFACE TIMING / PCM INTERFACE TIMING / DOUT
BCLK Inactive Edge to DOUT Delay	t_CLKTX					14	ns
BCLK Active Edge to DOUT Hi-Z Delay	t_HIZ			4		16	ns
BCLK Inactive Edge to DOUT Active Delay	t_ACTV			0		14	ns
I²C SLAVE CONTROL INTERFACE TIMING
Serial Clock Frequency	f_SCL					1000	kHz
Bus Free Time Between STOP and START Conditions	t_BUF			0.5			µs
Hold Time (Repeated) START Condition	t_HD,STA			0.26			µs
SCL Pulse-Width Low	t_LOW			0.5			µs
SCL Pulse-Width High	t_HIGH			0.26			µs
Setup Time for a Repeated START Condition	t_SU,STA			0.26			µs
Data Hold Time	t_HD,DAT			0		450	ns
Data Setup Time	t_SU,DAT			50			ns
SDA and SCL Receiving Rise Time	t_R			20 x V_DVDDIO / 5.5V		120	ns
SDA and SCL Receiving Fall Time	t_F			20 x V_DVDDIO / 5.5V		120	ns
SDA Transmit Fall Time	t_F			20 x V_DVDDIO / 5.5V		120	ns
Setup Time for STOP Condition	t_SU,STO			0.26			µs
Bus Capacitance	C_B					550	pF
Pulse Width of Suppressed Spike	t_SP			0		50	ns
DIGITAL MICROPHONE INTERFACE TIMING CHARACTERISTICS
DMIC Clock Output Frequency	f_{DMIC_CLK}	f_BCLK from the 48kHz family clock base, DMIC_RATE = 0x0			0.768		MHz
		f_BCLK from the 48kHz family clock base, DMIC_RATE = 0x1			1.536
		f_BCLK from the 48kHz family clock base, DMIC_RATE = 0x2			3.072
DMIC Clock Output Duty Cycle				45		55	%
DMIC Data to DMIC Clock Setup Time	t_{DMIC_SETUP}	Either DMIC clock edge		40			ns
DMIC Clock to DMIC Data Hold Time	t_{DMIC_HOLD}	Either DMIC clock edge		0			ns

Note 1:	100% production tested at T_A = +25°C. Specifications over temperature limits are guaranteed by design or characterization, unless otherwise noted.
Note 2:	Minimum and/or maximum limit is guaranteed by design and by statistical analysis of device characterization data. The specification is not guaranteed by production testing.
Note 3:	Maximum hardware enable time is specified assuming no initialization errors occur during the hardware shutdown to software shutdown state transition. If an error occurs, then the device retries up to 5 times (before either succeeding or failing to initialize) resulting in a maximum hardware enable time that is up to six times longer (for a failed initialization).
Note 4:	Assumes AMIC PGA input common mode bias voltage was pre-charged and retained for inactive input channel n (AMICn_PGA_HIZ = 1).
Note 5:	Dynamic range measurements are performed with the EIAJ method (-60dBFS output signal at 1kHz, A-weighted, and normalized to full scale).
Note 6:	For faster transitions from higher AMIC bias voltages to lower ones, disable the AMIC bias output with fast discharge enabled, and then re-enable it after setting it to the new voltage output level.
Note 7:	Digital filter performance is invariant over temperature and is production tested at T_A = +25°C.
Note 8:	Click and pop measurement performed by taking the peak voltage at 32 samples per second with an A-weighted filter.
Note 9:	Incremental efficiency is calculated as P_OUT / (P_IN - P_Q) x 100% where P_OUT is the amplifier output power, P_IN is the active power needed to drive the load, and P_Q is the quiescent power for the given use case. Incremental efficiency allows for the calculation of total use case power for any given configuration at the selected output load.

Figure 1. Hardware Enable and Disable Timing Diagram

Figure 2. PCM Interface Timing Diagram for I2S Mode — Figure 2. PCM Interface Timing Diagram for I²S Mode

Figure 3. PCM Interface Timing Diagram for TDM 1 Mode

Figure 4. PCM Interface Data Output Timing Diagram

Figure 5. I2C Slave Control Interface Timing Diagram — Figure 5. I²C Slave Control Interface Timing Diagram

Figure 6. Digital Microphone Interface Timing Diagram

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