Electrical Characteristics

Electrical Characteristics
(V_SYS = 7.6V, V_BATT = 7.6V, V_CHGIN = 9V, T_A = -40°C to +85°C. T_A = +25°C (typ). Limits are production tested at T_A = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER	SYMBOL	CONDITIONS	MIN	TYP	MAX	UNITS
GENERAL ELECTRICAL CHARACTERISTICS
CHGIN Voltage Range	V_CHGIN	Operating voltage	3.5		25.4	V
CHGIN Overvoltage Threshold	V_{CHGIN_OVLO}	V_CHGIN rising, 365mV hysteresis	25.4	26.05	26.7	V
CHGIN Overvoltage Delay	t_{D_CHGIN_OVLO}	V_CHGIN rising, 100mV overdrive (Note 1)		10		μs
CHGIN Overvoltage Delay	t_{D_CHGIN_OVLO}	V_CHGIN falling, 100mV overdrive (Note 1)		7		ms
CHGIN Undervoltage Threshold	V_{CHGIN_UVLO}	V_CHGIN rising, 20% hysteresis	3.43	3.5	3.57	V
CHGIN Quiescent Current (I_SYS = 0A)	I_CHGIN	V_CHGIN = 2.4V, the input is undervoltage and R_INSD is the only loading		0.075		mA
		V_CHGIN = 9.0V, charger disabled		0.17	0.5
		V_CHGIN = 9.0V, charger enabled, V_SYS = V_BATT = 8.7V (2S configuration), no switching		2.7	4
	I_{CHGIN_STBY}	MODE[3:0] = 0x0 (DC-DC off), STBY = H or STBY_EN = 1, V_CHGIN = 5V			1
BATT Quiescent Current (I_SYS = 0A)	I_SHDN	FSHIP_MODE = 1 or DISQBAT = high, V_CHGIN = 0V, I_SYS = 0A, V_BATT = 13.5V		2.3	5.0	µA
	I_BATT	DISQBAT = low, I²C enabled, V_CHGIN = 0V, I_SYS = 0A, V_BATT = 13.5V		100	200
		V_SYS = 7.6V, V_BATT = 0V, charger disabled, T_A = +25°C		0.01	10
		V_SYS = 7.6V, V_BATT = 0V, charger disabled, T_A = +85°C (Note 1)		10
	I_BATTDN	V_CHGIN = 9V, V_BATT = 8.4V, Q_BAT is off, battery overcurrent protection disabled, charger is enabled but in its done mode, T_A = +25°C		57	65
	I_BATTDN	V_CHGIN = 9V, V_BATT = 8.4V, Q_BAT is off, battery overcurrent protection disabled, charger is enabled but in its done mode, T_A = +85°C (Note 1)		57
SYS Operating Voltage	V_SYS	Guaranteed by V_SYSUVLO and V_SYSOVLO	SYSUVLO rising		SYSOVLO rising	V
SYS Undervoltage Lockout Threshold	V_SYSUVLO	V_SYS falling, 530mV hysteresis	3.95	4.1	4.25	V
SYS Overvoltage Lockout Threshold	V_SYSOVLO	V_SYS rising, 430mV hysteresis, 2S battery	10.65	10.9	11.15	V
SYS Overvoltage Lockout Threshold	V_SYSOVLO	V_SYS rising, 267mV hysteresis, 3S battery	13.75	14.1	14.45	V
PVL Output Voltage	V_PVL		1.7	1.8	1.9	V
Thermal Shutdown Threshold	T_SHDN	T_J rising (Note 1)		165		°C
Thermal Shutdown Hysteresis		(Note 1)		15		°C
CHGIN Self-Discharge Resistance	R_INSD	V_CHGIN = 3V		44		kΩ
BATT Self-Discharge Resistance	R_BATSD	V_CHGIN = 9V, V_SYS = V_BATT= 5V		600		Ω
SYS Self-Discharge Resistance	R_SYSSD	V_CHGIN= 9V, V_SYS= V_BATT = 5V		600		Ω
Self-Discharge Latch Time		(Note 1)		300		ms
SWITCH MODE CHARGER / CHARGER
BATT Regulation Voltage Range	V_BATTREG	Programmable from 8.0V to 9.26V (2S battery) and 12.0V to 13.05V (3S battery), production tested at 8V, 8.38V, 8.8V and 9.26V only (2S battery) and 12V, 12.57V, 13.2V, and 13.89V only (3S battery)	8.00		13.05	V
BATT Regulation Voltage Accuracy		8.8V or 13.2V settings, T_A = +25°C	-0.9	-0.3	+0.3	%
BATT Regulation Voltage Accuracy		8.8V or 13.2V settings, T_A = 0°C to +85°C (Note 2)	-1	-0.3	+0.5	%
BATT Overvoltage Lockout Threshold	V_BATTOVLO	V_BATT rising above V_BATTREG, 2% hysteresis	75	240	375	mV/cell
BATT Undervoltage Lockout Threshold	V_BATTUVLO	V_BATT rising, 100mV hysteresis	2.0	2.5	3.0	V
Fast-Charge Current Program Range	I_FC	MAX77960; 100mA to 3A; production tested at 100mA, 200mA, 500mA, 1000mA, 1500mA, 2000mA, and 3000mA settings	0.10		3	A
Fast-Charge Current Program Range	I_FC	MAX77961; 100mA to 6A; production tested at 100mA, 200mA, 500mA, 1000mA, 1500mA, 2000mA, 3000mA, 3500mA, and 3800mA settings	0.10		6	A
Fast-Charge Current Accuracy		T_A = +25°C, V_BATT > V_SYSMIN, programmed for 100mA	80	100	120	mA
		T_A = +25°C, V_BATT > V_SYSMIN, programmed for 200mA	180	200	220
		T_A = +25°C, V_BATT > V_SYSMIN, programmed for 500mA	481	500	519
		T_A = +25°C, V_BATT > V_SYSMIN, programmed for 1000mA	962	1000	1038
		T_A = +25°C, V_BATT > V_SYSMIN, programmed for 2000mA	1925	2000	2075
		T_A = +25°C, V_BATT > V_SYSMIN, programmed for 3000mA	2887	3000	3113
		MAX77961. T_A = +25°C, V_BATT > V_SYSMIN, programmed for 3500mA	3369	3500	3631
		MAX77961. T_A = +25°C, V_BATT > V_SYSMIN, programmed for 3800mA	3657	3800	3943
Fast-Charge Current Accuracy (Over Temperature)		-40°C < T_A < +85°C, V_BATT > V_SYSMIN, programmed for 200mA or less (Note 2)	-20		+20	mA
Fast-Charge Current Accuracy (Over Temperature)		-40°C < T_A < +85°C, V_BATT > V_SYSMIN, programmed for greater than 200mA (Note 2)	-5		+5	%
CHGIN Adaptive Voltage Regulation Range	V_{CHGIN_REG}	I²C programmable	4.025		19.05	V
CHGIN Adaptive Voltage Regulation Accuracy		4.55V setting	4.42	4.55	4.68	V
CHGIN Current Limit Range	CHGIN_ILIM	MAX77960; programmable; production tested at 100mA, 150mA, 200mA, 500mA, 1000mA, 1500mA, and 3000mA settings only	0.1		3.15	A
CHGIN Current Limit Range	CHGIN_ILIM	MAX77961; programmable; production tested at 100mA, 150mA, 200mA, 500mA, 1000mA, 1500mA, 3000mA, 4000mA, and 6300mA settings only	0.1		6.3	A
CHGIN Current Limit Accuracy		Charger enabled, 100mA input current setting, T_A = +25°C	88	98	108	mA
		Charger enabled, 200mA input current setting, T_A = +25°C	175	195	215
		Charger enabled, 500mA input current setting, T_A = +25°C	475	488	500
		Charger enabled, 1000mA input current setting, T_A = +25°C	950	975	1000
		Charger enabled, 3000mA input current setting, T_A = +25°C	2850	2925	3000
		MAX77961; charger enabled, 4000mA input current setting, T_A = +25°C	3800	3900	4000
		MAX77961; charger enabled, 6300mA input current setting, T_A = +25°C	5985	6143	6300
CHGIN Current Limit Accuracy (Over Temperature)		Charger enabled, 200mA or less input current setting, -40°C < T_A < +85°C (Note 2)	-22.5		+17.5	%
CHGIN Current Limit Accuracy (Over Temperature)		Charger enabled, greater than 200mA input current setting, -40°C < T_A < +85°C (Note 2)	-7.5		+2.5	%
Precharge Voltage Threshold	V_PRECHG	V_BATT rising, voltage threshold per cell	2.4	2.5	2.6	V/Cell
Precharge Current	I_PRECHG		35	50	65	mA
Prequalification Threshold Hysteresis	V_PQ-H	Applies to V_PRECHG		150		mV/Cell
Minimum SYS Voltage Accuracy	V_SYSMIN	Programmable from 5.535V to 6.970V (2S battery) and 8.303V to 10.455V (3S battery), V_BATT = 5.6V (2S battery) or 8.4V (3S battery), tested at 3V/cell setting	-3		+3	%
Trickle Charge Current	I_TRICKLE	Default setting = enabled; ITRICKLE[1:0] = 00	75	100	125	mA
		Default setting = enabled; ITRICKLE[1:0] = 01 (Note 2)	150	200	250
		Default setting = enabled; ITRICKLE[1:0] = 10 (Note 2)	225	300	375
		Default setting = enabled; ITRICKLE[1:0] = 11	300	400	500
Top-Off Current Program Range	I_TO	Programmable from 100mA to 600mA	100		600	mA
Charge Termination Deglitch Time	t_TERM	2mV overdrive, 100ns rise/fall time (Note 1)		160		ms
Charger Restart Threshold Range	V_RSTRT	Program options for disabled, 100mV/cell, 150mV/cell, and 200mV/cell with CHG_RSTRT[1:0]	100		200	mV/cell
Charger Restart Deglitch Time		10mV overdrive, 100ns rise time (Note 1)		130		ms
Charger State Change Interrupt Deglitch Time	t_SCIDG	Excludes transition to timer fault state, watchdog timer state (Note 1)		30		ms
SWITCH MODE CHARGER / CHARGE TIMER
Prequalification Time	t_PQ	Applies to both low-battery prequalification and dead-battery prequalification modes (Note 1)		30		min
Fast-Charge Constant Current + Fast-Charge Constant Voltage Time	t_FC	Adjustable from 3hrs, 4hrs, 5hrs, 6hrs, 7hrs, 8hrs, 10hrs including a disable setting; 3hrs default (Note 1)		3		hrs
Top-Off Time	t_TO	Adjustable from 30s to 70min in 10min steps (Note 1)		30		min
SWITCH MODE CHARGER / WATCHDOG TIMER
Watchdog Timer Period	t_WD	(Note 3)	80			s
SWITCH MODE CHARGER / BUCK-BOOST
CHGIN OK to Start Switching Delay	t_START	Delay from INOKB H → L to LX_ start switching (Note 1)		150		ms
Buck-Boost Current Limit	HSILIM	MAX77960, V_CHGIN = 9V, V_SYS = V_BATT= 7.6V	4.3	5	5.7	A
Buck-Boost Current Limit	HSILIM	MAX77961, V_CHGIN= 9V, V_SYS = V_BATT= 7.6V	8.6	10	11.4	A
SWITCH MODE CHARGER / BUCK-BOOST / SWITCH IMPEDANCE AND LEAKAGE CURRENT
LX1 High-Side Resistance	R_{LX1_HS}	V_CHGIN = 9V, V_SYS = V_BATT = 7.6V		16.5	26	mΩ
LX1 Low-Side Resistance	R_{LX1_LS}	V_CHGIN = 9V, V_SYS = V_BATT = 7.6V		17	30	mΩ
LX2 High-Side Resistance	R_{LX2_HS}	V_CHGIN = 9V, V_SYS = V_BATT = 7.6V		9	18	mΩ
LX2 Low-Side Resistance	R_{LX2_LS}	V_CHGIN = 9V, V_SYS = V_BATT = 7.6V		21	33	mΩ
LX_ Leakage Current		LX1 = PGND or CHGIN, LX2 = PGND or SYS, T_A = +25°C		0.01	10	µA
LX_ Leakage Current		LX1 = PGND or CHGIN, LX2 = PGND or SYS, T_A = +85°C (Note 1)		1		µA
BST_ Leakage Current		BST_ = 1.8V, T_A = +25°C		0.01	10	µA
BST_ Leakage Current		BST_ = 1.8V, T_A = +85°C (Note 1)		1		µA
SYS, SYSA Leakage Current		V_SYS = V_SYSA = 8.4V, V_BATT = 0V, charger disabled, T_A = +25°C		0.01	10	µA
SYS, SYSA Leakage Current		V_SYS = V_SYSA = 8.4V, V_BATT = 0V, charger disabled, T_A = +85°C (Note 1)		1		µA
CSINP, CSINN Leakage Current	I_CSINP, I_CSINN	V_CHGIN = 26.05V, V_CSINP = V_CSINN = 26.05V, T_A = +25°C	-1		+1	µA
SWITCH MODE CHARGER / SMART POWER SELECTOR
BAT to SYS Dropout Resistance	R_BAT2SYS			10	17	mΩ
BATT to SYS Reverse Regulation Voltage	V_BSREG			90		mV
SWITCH MODE CHARGER / BATT TO SYS OVERCURRENT ALERT
Battery Overcurrent Threshold Range	I_BOVCR	Programmable from 3A to 10A. Option to disable.	3		10	A
Battery Overcurrent Debounce Time	t_BOVRC	Response time for generating the overcurrent interrupt (Note 3)			3.3	ms
SWITCH MODE CHARGER / THERMAL FOLDBACK
Junction Temperature Thermal Regulation Loop Setpoint Program Range	T_REG	Junction temperature when charge current is reduced; programmable from 85°C to 130°C in 5°C steps; default value is 115°C	85		130	°C
Thermal Regulation Gain	A_TJREG	The charge current is decreased 5% of the fast-charge current setting for every degree that the junction temperature exceeds the thermal regulation temperature. This slope ensures that the full-scale current of 3A (MAX77960)/6A (MAX77961) is reduced to 0A by the time the junction temperature is 20°C above the programmed loop set point. For lower programmed charge currents such as 480mA, this slope is valid for charge current reductions down to 80mA; below 100mA the slope becomes shallower but the charge current still reduced to 0A if the junction temperature is 20°C above the programmed loop set point. (Note 1)		-5		%/°C
SWITCH MODE CHARGER / THERMISTOR MONITOR
THM Threshold, COLD	THM_COLD	V_THM/V_AVL rising, 1% hysteresis (thermistor temperature falling)	70.05	74.56	77.43	%
THM Threshold, COOL	THM_COOL	V_THM/V_AVL rising, 1% hysteresis (thermistor temperature falling)	56.37	60	62.31	%
THM Threshold, WARM	THM_WARM	V_THM/V_AVL falling, 1% hysteresis (thermistor temperature rising)	32.58	34.68	36.01	%
THM Threshold, HOT	THM_HOT	V_THM/V_AVL falling, 1% hysteresis (thermistor temperature rising)	21.18	22.5	23.41	%
THM Threshold, Disabled		VTHM/AVL falling, 1% hysteresis, THM function is disabled below this voltage	4.67	5.9	7.01	%
THM Threshold, Battery Removal Detection		V_THM/V_AVL rising, 1% hysteresis, battery removal	81.74	87	90.35	%
THM Input Leakage Current		V_THM = GND or V_AVL; T_A = +25°C		0.1	1	µA
THM Input Leakage Current		V_THM = GND or V_AVL; T_A = +85°C (Note 1)		0.1		µA
REVERSE BUCK
Buck Current Limit	HSILIM_REV	f_SW = 600kHz	4.3	5	5.7	A
Reverse Buck Quiescent Current		Not switching: output forced 200mV above its target regulation voltage		1150		µA
Minimum BATT Voltage in OTG Mode	V_BATT.MIN.OTG	V_BATT = V_SYS, SYS UVLO falling threshold in OTG mode	5.96	6.14	6.32	V
CHGIN Voltage in OTG Mode	V_CHGIN.OTG	V_BATT = V_BATT.MIN.OTG, OTGEN = high	4.94	5.1	5.26	V
CHGIN Undervoltage Threshold in OTG Mode	V_CHGIN.OTG.UV	V_CHGIN falling, OTGEN = high		85		%
CHGIN Overvoltage Threshold in OTG Mode	V_CHGIN.OTG.OV	V_CHGIN rising, OTGEN = high		110		%
CHGIN Output Current Limit in OTG Mode	I_{CHGIN.OTG.LIM}	V_BATT = V_BATT.MIN.OTG, T_A = +25°C, OTG_ILIM[2:0] = 0b000, OTGEN = high		500	550	mA
		V_BATT = V_BATT.MIN.OTG, T_A = +25°C, OTG_ILIM[2:0] = 0b001, OTGEN = high		900	990
		V_BATT = V_BATT.MIN.OTG, T_A = +25°C, OTG_ILIM[2:0] = 0b011, OTGEN = high		1500	1650
		V_BATT = V_BATT.MIN.OTG, T_A = +25°C, OTG_ILIM[2:0] = 0b111, OTGEN = high		3000	3300
CHGIN Output Voltage Ripple in OTG Mode		Discontinuous inductor current (i.e., skip mode), OTGEN = high (Note 1)		±150		mV
CHGIN Output Voltage Ripple in OTG Mode		Continuous inductor current, OTGEN = high (Note 1)		±150		mV
IO CHARACTERISTICS
R_INLIM, R_ISET, R_VSET, R_TO, R_CNFG Resistor Range	R_{PROG_}		5.49		226	kΩ
Output Low Voltage INOKB, STAT		I_SINK = 1mA, T_A = +25°C			0.4	V
Output High Leakage INOKB, STAT		5.5V, T_A = +25°C	-1	0	+1	µA
Output High Leakage INOKB, STAT		5.5V, T_A = +85°C (Note 1)		0.1		µA
DISQBAT, OTGEN, STBY Logic Input Low Threshold	V_IL				0.4	V
DISQBAT, OTGEN, STBY Logic Input High Threshold	V_IH		1.4			V
DISQBAT, OTGEN, STBY Logic Input Leakage Current		5.5V (including current through pulldown resistor)		5.5	10	µA
DISQBAT, OTGEN, STBY Pulldown Resistor	R_DISQBAT			1000	1200	kΩ
INTERFACE / I²C INTERFACE AND INTERRUPT
SCL, SDA Input Low Level					0.3 x V_AVL	V
SCL, SDA Input High Level			0.7 x V_AVL			V
SCL, SDA Input Hysteresis				0.05 x V_AVL		V
SCL, SDA Logic Input Current		SDA = SCL = 5.5V	-10		+10	µA
SCL, SDA Input Capacitance		(Note 1)		10		pF
SDA Output Low Voltage		Sinking 20mA			0.4	V
Output Low Voltage INTB		I_SINK = 1mA			0.4	V
Output High Leakage INTB		V_INTB = 5.5V, T_A = +25°C	-1	0	+1	μA
Output High Leakage INTB		V_INTB = 5.5V, T_A = +85°C (Note 1)		0.1		μA
INTERFACE / I²C COMPATIBLE INTERFACE TIMING FOR STANDARD, FAST, AND FAST-MODE PLUS
Clock Frequency	f_SCL				1000	kHz
Hold Time (Repeated) START Condition	t_HD;STA		0.26			µs
CLK Low Period	t_LOW		0.5			µs
CLK High Period	t_HIGH		0.26			µs
Set-Up Time Repeated START Condition	t_SU;STA		0.26			µs
DATA Hold Time	t_HD:DAT		0			µs
DATA Valid Time	t_VD:DAT				0.45	µs
DATA Valid Acknowledge Time	t_VD:ACK				0.45	µs
DATA Set-Up time	t_SU;DAT		50			ns
Set-Up Time for STOP Condition	t_SU;STO		0.26			µs
Bus-Free Time Between STOP and START	t_BUF		0.5			µs
Pulse Width of Spikes that Must be Suppressed by the Input Filter				50		ns
INTERFACE / I²C COMPATIBLE INTERFACE TIMING FOR HS-MODE (C_B = 100pF)
Clock Frequency	f_SCL				3.4	MHz
Set-Up Time Repeated START Condition	t_SU;STA		160			ns
Hold Time (Repeated) START Condition	t_HD;STA		160			ns
CLK Low Period	t_LOW		160			ns
CLK High Period	t_HIGH		60			ns
DATA Set-Up Time	t_SU;DAT		10			ns
DATA Hold Time	t_HD:DAT		0			ns
Set-Up Time for STOP Condition	t_SU;STO		160			ns
Pulse Width of Spikes that Must be Suppressed by the Input Filter				10		ns
INTERFACE / I²C COMPATIBLE INTERFACE TIMING FOR HS-MODE (C_B = 400pF)
Clock Frequency	f_SCL				1.7	MHz
Set-Up Time Repeated START Condition	t_SU;STA		160			ns
Hold Time (Repeated) START Condition	t_HD;STA		160			ns
CLK Low Period	t_LOW		320			ns
CLK High Period	t_HIGH		120			ns
DATA Set-Up time	t_SU;DAT		10			ns
DATA Hold Time	t_HD:DAT		0			ns
Set-Up Time for STOP Condition	t_SU;STO		160			ns
Pulse Width of Spikes that Must be Suppressed by the Input Filter				10		ns

Note 1:	Internal design target.
Note 2:	Guaranteed by design. Not production tested.
Note 3:	Guaranteed by design. Production tested through scan.

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