Pin Specifications

Pin Configuration
PIN NAME FUNCTION TYPE
Pin Description
B7, C7, D7, E7 IN The Power Input for the IC. Connect a 4.7μF capacitor between IN and PGND. Power
B5 BST1P Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST1P and CF1P. Analog
B2 BST1N Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST1N and CF1N. Analog
E5 BST2P Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST2P and CF2P. Analog
E2 BST2N Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST2N and CF2N. Analog
A6, A7, B6 CF1P Flying Capacitor Positive Terminal. Connecting 2 x 47μF capacitors between CF1P and CF1N is suggested. Power
A2, A3, B3 CF1N Flying Capacitor Negative Terminal Power
E6, F6, F7 CF2P Flying Capacitor Positive Terminal. Connecting 2 x 47μF capacitors between CF2P and CF2N is suggested. Power
E3, F2, F3 CF2N Flying Capacitor Negative Terminal Power
A4, A5, B4, C4, D4, E4, F4, F5 OUT Switched Capacitor Converter Output. Connect 2 x 10μF capacitors between OUT and PGND. Power
A1, B1, E1, F1 PGND Power Ground Pin Power
C1 AVDD 1.8V Linear Regulator Output. Bypass to PGND with a 1μF capacitor. Do not apply an external load. Analog
C6 HVDD Linear Regulator Outputs VOUT + 1.8V. Bypass to OUT with a 1μF capacitor. Do not apply an external load. Analog
D1 AGND Analog Ground Pin Analog
D6 PGOOD Power Good Indicator Output Digital Output
C5 EN Active-High Chip Enable Input Digital Input
C3 NC Do Not Connect
D5 IRQB Interrupt Output. Connect a 100kΩ pullup resistor between IRQB and VIO. Digital Output
C2 SDA I2C Interface Data I/O Digital I/O
D2 SCL I2C Interface Clock Input Digital Input
D3 VIO I/O Supply Voltage Input. Bypass to AGND with a 1μF capacitor. Power