Package Information

Package Information
WLP
Package Code W422D2+ 1
Outline Number 21-100293
Land Pattern Number Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA) 44.11°C/W

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

data-opMAX77932CEWO%2B
data-opMAX77932CEWO%2BT
The Power Input for the IC. Connect a 4.7μF capacitor between IN and PGND.Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST1P and CF1P.Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST1N and CF1N.Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST2P and CF2P.Supply Input for Internal Gate Driver. Connect a 0.047μF bootstrap capacitor between BST2N and CF2N.Flying Capacitor Positive Terminal. Connecting 2 x 47μF capacitors between CF1P and CF1N is suggested.Flying Capacitor Negative TerminalFlying Capacitor Positive Terminal. Connecting 2 x 47μF capacitors between CF2P and CF2N is suggested.Flying Capacitor Negative TerminalSwitched Capacitor Converter Output. Connect 2 x 10μF capacitors between OUT and PGND.Power Ground Pin1.8V Linear Regulator Output. Bypass to PGND with a 1μF capacitor. Do not apply an external load.Linear Regulator Outputs VOUT + 1.8V. Bypass to OUT with a 1μF capacitor. Do not apply an external load.Analog Ground PinPower Good Indicator OutputActive-High Chip Enable InputDo Not ConnectInterrupt Output. Connect a 100kΩ pullup resistor between IRQB and VIO.I2C Interface Data I/OI2C Interface Clock InputI/O Supply Voltage Input. Bypass to AGND with a 1μF capacitor.