| PIN | NAME | FUNCTION |
| 1 | GND | Ground |
| 2 | GND_LNA | Ground for Low-Noise Amplifier |
| 3 | LNA | Low-Noise Amplifier Input |
| 4 | PWRDN |
Power-Down, Active-High. When the pin is controlled by external MCU, apply logic-high for shutdown mode or logic-low to enable the device. After a falling edge of PWRDN, the internal registers are reset to default values. When the pin is connected to GND, the device cannot enter the lowest current shutdown state. Proper start-up timing is for MCU to drive PWRDN high and wait for 1ms, then drive PWRDN low and wait for 0.2ms before writing to registers. |
| 5 | CSB | Serial Interface Chip Select. Active low. |
| 6 | SCLK | Serial Interface Clock Input for Register Programming |
| 7 | SDIO | Serial Interface Data Input/Output for Register Programming. When CSB is at logic-low. |
| 8 | DATA | Data Output of Demodulated Received Signal |
| 9 | XTAL1 | First Crystal Input. Can be driven single-ended. |
| 10 | XTAL2 | Second Crystal Input |
| 11 | CLK | Recovered Clock Output. If the clock output is disabled, connect to GND. If the clock output is enabled, tie the pin to GND through a 10kΩ resistor. |
| 12 | VDD | Power-Supply Voltage. Connect a 0.01μF capacitor to ground. |
| PADDLE | GND | Ground |