Package Information

Package Information 6 WLP
Package Code N60D1+1
Outline Number 21-100086
Land Pattern Number Refer to Application Note 1891
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA) 98°C/W
6 SOT23
Package Code U6+1
Outline Number 21-0058
Land Pattern Number 90-0175
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA) 230°C/W
Junction to Case (θJC) 76°C/W

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Note:

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

data-opMAX40000AUT12%2B
data-opMAX40001ANT12%2BT
data-opMAX40000ANT12%2BT
data-opMAX40001ANT12%2B
data-opMAX40000ANT12%2B
data-opMAX40001AUT12%2B
data-opMAX40000AUT12%2BT
data-opMAX40001AUT12%2BT
data-opMAX40001AUT22%2BT
data-opMAX40001AUT22%2B
Inverting Input of ComparatorInternal Voltage Reference Output. Bypass REF pin with a 0.1μF capacitor to GND as close as possible to the device.GroundNoninverting Input of ComparatorVDD Supply Voltage. Bypass VDD with a 0.1μF capacitor to GND as close as possible to the device pin.Open-Drain Output (MAX40001)/Push-Pull Output (MAX40000). For the open-drain version, connect a 100kΩ pullup resistor from OUT to any pullup voltage up to 5.5V.