6 WLP
8 TDFN
| PIN | NAME | FUNCTION | |
| WLP | TDFN | ||
| A1 | 1 | IN | Regulator Supply Input Pin. Connect to voltage between 1.7V and 5.5V, and bypass with a 4.7µF capacitor from IN to GND. |
| A2 | 2 | GND | Regulator Ground Pin. Bring IN and OUT bypass capacitor GND connections to this pin for best performance. Short the pin to EP in PCB layout in TDFN applications. |
| A3 | 3 | EN | Enable Input Pin. Connect this pin to a logic signal to enable (VEN high) or disable (VEN low) the regulator output. Connect to IN to keep the output enabled whenever a valid supply voltage is present. |
| B3 | 4 | MODE | Mode-Select Pin. Connect this pin to a logic-high signal if normal operation is desired, and connect it to a logic-low signal if low-power operation is desired. When MODE is high, maximum output load current when LDO is in regulation is 500mA, and when MODE is low, maximum output load current is 20mA. |
| — | 5 | POK | Power-OK Output Pin. Connect a pullup resistor from this pin to a supply to create a signal that goes high after the regulator output has reached its regulation voltage. |
| — | 6 | FB/OUTS | MAX38911: Output Voltage Sense Input. Connect to the load at a point where accurate regulation is required to eliminate voltage drops.MAX38912: Feedback Input Pin. Connect a resistor-divider string from OUT to GND with the midpoint tied to this pin to set the output voltage. In a typical application circuit, VOUT = 0.6V x (1 + RFBTOP/RFBBOT). |
| B2 | 7 | BYP | Bypass Capacitor Input Pin. Connect a 0.001µF to 0.1µF capacitor between OUT and BYP to reduce output noise and set the regulator soft-start rate. |
| B1 | 8 | OUT | Regulator Output Pin. Sources up to 500mA when MODE = HIGH and up to 20mA when MODE = LOW at the output regulation voltage. Bypass with a 4.7µF (2µF minimum effective capacitance), low-ESR (< 0.03Ω) capacitor to GND. |
| — | EP | EP | Exposed Pad. Connect the exposed pad to a ground plane with low thermal resistance to provide best heat sinking. Connected to GND internally. |