16 TQFN
| PIN | NAME | FUNCTION |
| 1 | ENC | Charger Enable Input. Drive this pin high to enable charging of the supercapacitor while VSYS is above the charging threshold. Drive this pin low to disable charging. If not driven, tie this pin to the SYS rail. |
| 2 | ENB | Backup Enable Input. Drive this pin high to enable system backup when VSYS drops below the backup threshold. Drive this pin low to disable backup. If not driven, tie this pin to the SYS rail. |
| 3 | RDY | Ready Status Pin. Connect a pullup resistor from RDY to a logic supply. VRDY will be pulled low when VFBCR is below 0.5V and released when it is above 0.5V. VRDY is pulled low when VENC and VENB are both low. |
| 4 | BKB | Backup Status Pin. Connect a pullup resistor from BKB to a logic supply. VBKB will be pulled low when VFBS is regulating at 1.2V and released when it is above 1.23V. VBKB is released high when VENC and VENB are both low. It is recommended to have an RC filter at the BKB Pin as shown in Figure 1. |
| 5 | CAP | Supercapacitor. Connect to a supercapacitor rated between 0.8V to 5V. Put a high-frequency capacitor of 22µF close to the CAP pin. |
| 6, 7, 8 | LX | Inductor Switching Node. Connect a 0.47μH inductor from LX to CAP. Keep this switching node separated from feedback signal nodes FBS, FBCH, and FBCR as much as possible. |
| 9 | FBCR | Supercapacitor Ready Input. RDY will go high when VFBCR reaches 0.5V. It is recommended to place a 0.47µF from FBCR pin to GND. |
| 10 | FBCH | Supercapacitor Feedback Input. Connect a resistor-divider from CAP to FBCH to GND to set the supercapacitor maximum charging voltage. |
| 11 | FBS | System Feedback Input. Connect a resistor-divider from SYS to FBS to GND to set the system backup operating voltage. When VFBS is >102.5% of VFBS_BU, the supercapacitor will be charged from SYS. |
| 12 | ISET | Charge/Discharge Current Select. During charging, the average supercapacitor current (ICAP_CHG) is set to ICAP_CHG = 1.5A x (33kΩ/RISET). During backup, VSYS is regulated through the boost regulator with a peak inductor current of ILX_BU = 3A x (33kΩ/RISET). |
| 13, 14 | SYS | System Supply. Connect to the system supply and bypass with 2x47µF and 2x22µF ceramic capacitors to PGND. In addition, place a high-frequency filter capacitor of 1µF close to the part across the SYS and PGND pins. |
| 15, 16 | PGND | Power Ground. |
| EP | GND | Analog Ground. Connect the exposed pad to the ground plane with excellent thermal conduction to ambient temperature to avoid overtemperature. |