| PARAMETER | SYMBOL | CONDITIONS | MIN | TYP | MAX | UNITS | |
|---|---|---|---|---|---|---|---|
| SYS Voltage Range | VSYS | Guaranteed by LX peak backup current and SYS shutdown current | 2.5 | 5.5 | V | ||
| CAP Voltage Range | VCAP | Guaranteed by maximum on-time and CAP shutdown current | 0.5 | 5.5 | V | ||
| SYS Shutdown Current | ISYS_SD | VSYS = 5.5V, VENC = VENB = 0V | TA = +25°C | 0.010 | 1 | µA | |
| TA = +125°C | 0.46 | ||||||
| SYS Ready Supply Current | ISYS_RDY | VFBS = 1.3V, VFBCH = 0.515V, VFBCR = 0.6V | TA = +25°C | 4.5 | 8 | µA | |
| TA = +125°C | 8 | ||||||
| SYS Backup Supply Current | ISYS_BU | VFBS = 1.212V, VFBCH = 0.5V, VFBCR = 0.6V | 75 | 150 | µA | ||
| CAP Shutdown Current | ICAP_SD | VCAP = 5.5V, VENC = VENB = 0V | TA = +25°C | 0.01 | 1 | µA | |
| TA = +125°C | 0.2 | ||||||
| System Undervoltage Threshold | VUVLOF | VSYS falling, 100mV typical hysteresis, VCAP = 0V | 2.1 | 2.2 | 2.3 | V | |
| FBS Backup Voltage | VFBS_BU | VFBS rising, when discharging stops | 1.188 | 1.2 | 1.212 | V | |
| FBS Charging Threshold | VFBS_CHG | From VFBS backup voltage, when charging begins | 2 | 2.5 | 3 | % | |
| FBCH Threshold | VTH_FBCH | VFBCH rising, when charging stops; 10mV typical hysteresis | 0.495 | 0.5 | 0.505 | V | |
| FBCR Threshold | VTH_FBCR | VFBCR rising, when RDY releases; 10mV typical hysteresis | 0.495 | 0.5 | 0.505 | V | |
| ENC Input Threshold | VIL | VFBS = 1.3V, VFBCH = 0.4V, when LX stops switching | VENC falling | 600 | 850 | mV | |
| VIH | VFBS = 1.3V, VFBCH = 0.4V | VENC rising | 950 | 1200 | |||
| ENB Input Threshold | VIL | VFBS = 1.1V, VFBCH = 0.4V, when LX stops switching | VENB falling | 600 | 850 | mV | |
| VIH | VFBS = 1.1V, VFBCH = 0.4V | VENB rising | 950 | 1200 | |||
| ISET Resistor Range | RISET | Guaranteed by LX peak current limits | 33 | 100 | kΩ | ||
| LX Switching Frequency | FSW | VCAP = 1.5V, ISYS = 1A | 1.2 | MHz | |||
| LX Peak Backup Current Limit | ILX_BU | Circuit of Figure 1, VCAP = 2V, VSYS = 2.5V (Note 1) | RISET = 33kΩ | 2.25 | 3 | 3.75 | A |
| ILX_BU | Circuit of Figure 1, VCAP = 2V, VSYS = 2.5V (Note 1) | RISET = 100kΩ | 1 | ||||
| LX Peak Charge Current Limit (Note 1) | ILX_CHG | Circuit of Figure 1, VSYS = 3.7V, VCAP = 2V | RISET = 33kΩ | 2.25 | 3 | 3.75 | A |
| RISET = 100kΩ | 1 | ||||||
| Feedback Input Bias Current | IFBS, IFBCH, IFBCR | VFBS = 1.2V, VFBCH = VFBCR = 0.5V | TA = +25°C | -0.1 | 0.01 | +0.1 | µA |
| TA = +125°C | 0.01 | ||||||
| Enable Input Leakage Current | IENC, IENB | 0V < VENC, VENB < 5.5V | TA = +25°C | -1 | 0.004 | 1 | µA |
| TA = +125°C | 0.01 | ||||||
| LX Low-Side FET Resistance | RLOW | VLX switched to 0V | 42 | 84 | mΩ | ||
| LX High-Side FET Resistance | RHIGH | VLX switched to VSYS | 57 | 114 | mΩ | ||
| LX Leakage Current | ILX_LKG | VENC = VENB = 0V, VSYS = 5.5V, VLX = 0 to 5.5V | TA = +25°C | -1 | 0.01 | 1 | µA |
| TA = +125°C | 0.26 | ||||||
| Maximum On-Time | tON | Typical Application Circuit, VSYS = 2.9V | VCAP = 2V | 320 | 400 | 480 | ns |
| VSYS = 2.9V | VCAP = 1.2V | 570 | |||||
| Minimum Off-Time | tOFF | Backup mode, VFBS = 1.164V | 80 | 100 | 120 | ns | |
| Maximum Duty Cycle | DutyMAX | VCAP = 0.5V | 90 | 95 | % | ||
| Overtemperature Lockout Threshold | TOTLO | TJ rising, 15°C typical hysteresis | 165 | °C | |||
| Logic Output Leakage High | IBKB_H | VBKB = 5.5V, VRDY = 5.5V | TA = +25°C | -1 | 0.001 | +1 | µA |
| IRDY_H | VBKB = 5.5V, VRDY = 5.5V | TA = +125°C | 0.01 | ||||
| Logic Output Voltage Low | VBKB_L VRDY_L | IBKB = 10mA, IRDY = 10mA | 0.1 | 0.4 | V | ||
| High-Side FET Zero-Crossing | IZXP | Circuit of Figure 1, VSYS = 2.9V, VCAP = 2V (Note 1) | 60 | mA | |||
| Low-Side FET Zero-Crossing | IZXN | Circuit of Figure 1, VSYS = 3.7V, VCAP = 2V (Note 1) | 180 | mA | |||
| Note 1: | DC measurement, actual inductor current accuracy in the circuit is affected by the propagation delay time. |
{"data-trigger":"hover","data-placement":"right","data-toggle":"popover","data-original-title":"\u003cstrong\u003eNote 1\u003c/strong\u003e","data-html":true,"data-content":"DC measurement, actual inductor current accuracy in the circuit is affected by the propagation delay time."}
{"data-trigger":"hover","data-placement":"right","data-toggle":"popover","data-original-title":"\u003cstrong\u003eNote 1\u003c/strong\u003e","data-html":true,"data-content":"DC measurement, actual inductor current accuracy in the circuit is affected by the propagation delay time."}
{"data-trigger":"hover","data-placement":"right","data-toggle":"popover","data-original-title":"\u003cstrong\u003eNote 1\u003c/strong\u003e","data-html":true,"data-content":"DC measurement, actual inductor current accuracy in the circuit is affected by the propagation delay time."}
{"data-trigger":"hover","data-placement":"right","data-toggle":"popover","data-original-title":"\u003cstrong\u003eNote 1\u003c/strong\u003e","data-html":true,"data-content":"DC measurement, actual inductor current accuracy in the circuit is affected by the propagation delay time."}
{"data-trigger":"hover","data-placement":"right","data-toggle":"popover","data-original-title":"\u003cstrong\u003eNote 1\u003c/strong\u003e","data-html":true,"data-content":"DC measurement, actual inductor current accuracy in the circuit is affected by the propagation delay time."}