Package Code | T6888MK+2 |
Outline Number | 21-0510 |
Land Pattern Number | 90-0354 |
Thermal Resistance, Four-Layer Board: | |
Junction to Ambient (θJA) | 22.12°C/W |
Junction to Case (θJC) | 0.7°C/W |
data-opMAX32675ATK%2B
data-opMAX32675ATK%2BT
Digital Power-Supply Input. Bypass with 100nF to VSS and 1μF with 10mΩ to 150mΩ ESR to VSS.This device pin can be configured as a LDO output or a voltage supply input. Bypass with 100nF to VSS. Do not connect this device pin to any other external circuitry.Power Supply Input. This pin must always be connected to the VDDA device pin at the PCB level. Bypass this pin with 100nF to VSS and 1μF with 10mΩ to 150mΩ ESR to VSS.Analog Supply Voltage. This pin must always be connected to the VDDIO device pin at the PCB level. Bypass this pin to VSSA with 1.0μF and 0.01μF capacitors as close as possible to the package.Bypass with 4.7nF to VSS. Do not connect this device pin to any other external circuitry.Digital GroundAnalog GroundExposed Pad. This pad must be connected to VSS. Refer to Application Note 3273: Exposed Pads: A Brief Introduction for additional information.Active-Low, External System Reset Input. The device remains in reset while this pin is in its active state. When the pin transitions to its inactive state, the device performs a POR reset (resetting all logic on all supplies) and begins execution.
This pin has an internal pullup to the VDDIO supply.RF Crystal Oscillator Input. Connect the crystal between HFXIN and HFXOUT. Optionally, this pin can be configured as the input for an external square-wave source. See the Electrical Characteristics table for details of the crystal requirements.RF Crystal Oscillator Output. Connect the crystal between HFXIN and HFXOUT. See the Electrical Characteristics table for details of the crystal requirements.See Pin Description P0.10 for details.ADC0 ReadyADC1 ReadyPositive Differential Reference 0 Input. REF0P must be more positive than REF0N.Negative Differential Reference 0 Input. REF0P must be more positive than REF0N.Positive Differential Reference 1 Input. REF1P must be more positive than REF1N.Negative Differential Reference 1 Input. REF1P must be more positive than REF1N.ADC0 PGA Positive Output. Connect 1nF capacitor across CAP0P and CAP0N.ADC0 PGA Negative Output. Connect 1nF capacitor across CAP0P and CAP0N.ADC1 PGA Positive Output. Connect 1nF capacitor across CAP1P and CAP1N.ADC1 PGA Negative Output. Connect 1nF capacitor across CAP1P and CAP1N.Channel 0 Analog Input/Positive Differential Reference Input. When used as an analog input, may serve as either the positive or negative differential input. May also serve as current source output. When used as a reference input paired with AIN1, AIN0 must be more positive than AIN1.Channel 1 Analog Input/Negative Differential Reference Input. When used as an analog input, may serve as either the positive or negative differential input. May also serve as current source output. When used as a reference input paired with AIN0, AIN0 must be more positive than AIN1.Channel 2 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 3 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 4 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 5 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 6 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 7 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 8 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 9 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 10 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.Channel 11 Analog Input. May serve as either the positive or negative differential input paired with any of the other AINx analog inputs. May also serve as current source output.12-Bit DAC Analog Voltage OutputInternal Reference Output. It must be bypassed to VSSA with a 4.7μF capacitor.Single-Wire Debug I/O; Timer0 Port Map C InputSingle-Wire Debug Clock; Timer0 Port Map C OutputI2C0 Port Map A Serial Clock; Low-Power Timer0 Port Map B Input 2 Bits or Lower 16 Bits; Timer3 Port Map C Input 32 Bits or Lower 16 BitsI2C0 Port Map A Serial Data; Low-Power Timer0 Port Map B Output 32 Bits or Lower 16 Bits; Timer3 Port Map C Output 32 Bits or Lower 16 BitsUART0 Port Map A Rx; I2S0 Port Map B Serial Data Output; Timer0 Port Map C Input 32 Bits or Lower 16 BitsUART0 Port Map A Tx; I2S0 Port Map B Left/Right Clock; Timer0 Port Map C Output 32 Bits or Lower 16 BitsUART0 Port Map A CTS; I2S0 Port Map B Bit Clock; Timer1 Port Map C Input 32 Bits or Lower 16 Bits. This pin can be used to source a clock signal. It can also be used to receive a clock signal. This clock signal can be used for the 16-/24-bit delta-sigma converters. See the Electrical Characteristics table for the External _Clock parameters.UART0 Port Map A RTS; I2S0 Port Map B Serial Data Input; Timer1 Port Map C Output 32 Bits or Lower 16 BitsTimer2 Port Map C Output 32 Bits or Lower 16 Bits; SPI1 Port Map D Slave Select 0SPI1 Port Map A Master In Slave Out; UART2 Port Map B Rx; Timer3 Port Map C Input 32 Bits or Lower 16 BitsSPI1 Port Map A Master Out Slave In; UART2 Port Map B Tx; Timer3 Port Map B Output 32 Bits or Lower 16 BitsSPI1 Port Map A Serial Clock; UART2 Port Map B CTS; Timer0 Port Map C Input 32 Bits or Lower 16 BitsSPI1 Port Map A Slave Select 0; UART2 Port Map B RTS; Timer0 Port Map C Output 32 Bits or Lower 16 BitsI2C2 Port Map A Serial Clock; Timer1 Port Map C Input 32 Bits or Lower 16 BitsI2C2 Port Map A Serial Data; Timer1 Port Map C Output 32 Bits or Lower 16 BitsCM4 Tx Event Output; Timer2 Port Map C Output 32 Bits or Lower 16 BitsTimer3 Port Map C Output 32 Bits or Lower 16 BitsGPIO OnlyUART2 Port Map A Rx; UART2 Port Map B RTSUART2 Port Map A TxUART2 Port Map A CTSUART2 Port Map A RTS; Timer2 Port Map C Output 32 Bits or Lower 16 BitsGPIO OnlyDo Not Connect. Internally connected. Do not make any electrical connection to this pin, including power supply grounds.Do Not Connect. Internally connected. Do not make any electrical connection to this pin, including power supply grounds.This pin must be connected to a 0.1µF capacitor.No Connection. Not internally connected.