|
PARAMETER
|
SYMBOL
|
CONDITIONS
|
MIN
|
TYP
|
MAX
|
UNITS
|
Electrical Characteristics
(Limits are 100% tested at TA = +25°C and TA = +105°C. TYP specifications are provided for TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested. Specifications to the minimum operating temperature are guaranteed by design and are not production tested. GPIO are only tested at TA = +105°C.)
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POWER SUPPLIES
|
|
Core Input Supply Voltage A
|
VCOREA
|
|
0.9
|
1.1
|
1.21
|
V
|
|
Core Input Supply Voltage B
|
VCOREB
|
|
0.9
|
1.1
|
1.21
|
V
|
|
Input Supply Voltage, Battery
|
VREGI
|
Falling
|
2.0
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3.0
|
3.6
|
V
|
|
Rising
|
2.45
|
3.0
|
3.6
|
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Input Supply Voltage, Analog
|
VDDA
|
|
1.71
|
1.8
|
1.89
|
V
|
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Input Supply Voltage, TXIN
|
VTXIN
|
Bluetooth transmitter supply
|
1.1
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1.3
|
1.9
|
V
|
|
Input Supply Voltage, RXIN
|
VRXIN
|
Bluetooth receiver supply
|
1.1
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1.3
|
1.9
|
V
|
|
Input Supply Voltage, GPIO
|
VDDIO
|
|
1.71
|
1.8
|
1.89
|
V
|
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Input Supply Voltage, GPIO (High)
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VDDIOH
|
|
1.71
|
3.0
|
3.6
|
V
|
|
Power-Fail Reset Voltage
|
VRST
|
Monitors VCOREA
|
|
0.76
|
|
V
|
|
Monitors VCOREB
|
0.72
|
0.77
|
|
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Monitors VDDA
|
1.58
|
1.64
|
1.69
|
|
Monitors VDDIO
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1.58
|
1.64
|
1.69
|
|
Monitors VDDIOH
|
1.58
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1.64
|
1.69
|
|
Monitors VREGI
|
1.91
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1.98
|
2.08
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Monitors VRXOUT
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0.773
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|
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Monitors VTXOUT
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0.773
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|
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Power-On Reset Voltage
|
VPOR
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Monitors VCOREA
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0.57
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V
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Monitors VDDA
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1.25
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|
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VREGI Current, ACTIVE Mode
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IREGI_DACT
|
Dynamic, IPO enabled, fSYS_CLK(MAX) = 100MHz, total current into VREGI pin, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 in ACTIVE mode executing Coremark®, RV32 in SLEEP mode, ECC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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23.8
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μA/MHz
|
|
Dynamic, IPO enabled, fSYS_CLK(MAX) = 100MHz, total current into VREGI pin, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 and RV32 in ACTIVE mode executing While(1), ECC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA. This specification is a function of the IPO frequency. |
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29.3
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|
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Dynamic, IPO enabled, fSYS_CLK(MAX) = 100MHz, total current into VREGI pin, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 in ACTIVE mode executing While(1), RV32 in SLEEP mode, ECC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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22.2
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|
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Dynamic, total current into VREGI pin, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 in SLEEP mode, RV32 in ACTIVE mode running from ISO, ECC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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18.7
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|
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IREGI_FACT
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Fixed, IPO enabled, ISO enabled, total current into VREGI, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 in ACTIVE mode 0MHz, RV32 in ACTIVE mode 0MHz; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
|
|
740
|
|
μA
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VREGI Current, SLEEP Mode
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IREGI_DSLP
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Dynamic, IPO enabled, fSYS_CLK(MAX) = 100MHz, ISO enabled, total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 in SLEEP mode, RV32 in SLEEP mode, ECC disabled, standard DMA with two channels active; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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6.4
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μA/MHz
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IREGI_FSLP
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Fixed, IPO enabled, ISO enabled, total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 in SLEEP mode, RV32 in SLEEP mode, ECC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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|
1.33
|
|
mA
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VREGI Current, LOW POWER Mode
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IREGI_DLP
|
Dynamic, ISO enabled, total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 powered off, RV32 in ACTIVE mode, fSYS_CLK(MAX) = 60MHz; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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18.7
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μA/MHz
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IREGI_FLP
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Fixed, ISO enabled, total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, CM4 powered off, RV32 in ACTIVE mode 0MHz; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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|
630
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|
μA
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VREGI Current, MICRO POWER Mode
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IREGI_DMP
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Dynamic, ERTCO enabled, IBRO enabled, total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, LPUART active, fLPUART = 32.768kHz; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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230
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|
μA
|
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VREGI Current, STANDBY Mode
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IREGI_STBY
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Fixed, total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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7.1
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μA
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VREGI Current, BACKUP Mode
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IREGI_BK
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Total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, RTC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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All SRAM retained
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6.3
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μA
|
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Total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, RTC disabled; inputs tied to VSS, VDDIO, or VDDIOH, outputs source/sink 0mA
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No SRAM retention
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|
3
|
|
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Total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V, RTC disabled; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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SRAM0 retained
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4.4
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SRAM0 and SRAM1 retained
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5.2
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SRAM0, SRAM1, and SRAM2 retained
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5.6
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VREGI Current, POWER DOWN Mode
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IREGI_PDM
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Total current into VREGI pins, VREGI = 3.0V, VCOREA = VCOREB = 1.1V; inputs tied to VSS, VDDIO, or VDDIOH; outputs source/sink 0mA
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0.16
|
|
μA
|
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VREGO_X Output Current
|
VREGO_X_IOUT
|
Output current for each of the VREGO_X outputs
|
|
5
|
50
|
mA
|
|
VREGO_X Output Current Combined
|
VREGO_X_IOUT_TOT
|
All four VREGO_X outputs combined
|
|
15
|
100
|
mA
|
|
VREGO_X Output Voltage Range
|
VREGO_X_RANGE
|
VREGI ≥ VREGO_X + 200mV; output voltage range must be configured to meet the input voltage range of the load device pin (VRST to VMAX)
|
VRST
|
1.0
|
VMAX
|
V
|
|
VREGO_X Efficiency
|
VREGO_X_EFF
|
VREGI = 2.7V, VREGO_X = 1.1V, load = 30mA
|
|
90
|
|
%
|
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SLEEP Mode Resume Time
|
tSLP_ON
|
Time from power mode exit to execution of first user instruction
|
|
0.847
|
|
μs
|
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LOW POWER Mode Resume Time
|
tLP_ON
|
Time from power mode exit to execution of first user instruction
|
|
6.08
|
|
μs
|
|
MICRO POWER Mode Resume Time
|
tMP_ON
|
Time from power mode exit to execution of first user instruction
|
|
12.4
|
|
us
|
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STANDBY Mode Resume Time
|
tSTBY_ON
|
Time from power mode exit to execution of first user instruction
|
|
14.7
|
|
μs
|
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BACKUP Mode Resume Time
|
tBKU_ON
|
Time from power mode exit to execution of first user instruction
|
|
1.15
|
|
ms
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POWER DOWN Mode Resume Time
|
tPDM_ON
|
Time from power mode exit to execution of first user instruction
|
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5
|
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ms
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CLOCKS
|
|
System Clock Frequency
|
fSYS_CLK
|
|
|
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100,000
|
kHz
|
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Internal Primary Oscillator (IPO)
|
fIPO
|
|
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100
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|
MHz
|
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Internal Secondary Oscillator (ISO)
|
fISO
|
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60
|
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MHz
|
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Internal Baud Rate Oscillator (IBRO)
|
fIBRO
|
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7.3728
|
|
MHz
|
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Internal Nano-Ring Oscillator (INRO)
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fINRO
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8kHz selected
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8
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kHz
|
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16kHz selected
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16
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30kHz selected
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30
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External RTC Oscillator (ERTCO)
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fERTCO
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32kHz watch crystal, CL = 6pF, ESR < 90kΩ, C0 ≤ 2pF
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32.768
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kHz
|
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External RF Oscillator Frequency (ERFO)
|
fERFO
|
32MHz crystal, CL = 12pF, ESR ≤ 50Ω, C0 ≤ 7pF, temperature stability ±20ppm, initial tolerance ±20ppm
|
|
32
|
|
MHz
|
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RTC Operating Current
|
IRTC
|
All power modes, RTC enabled
|
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0.3
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μA
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RTC Power-Up Time
|
tRTC_ ON
|
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250
|
|
ms
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External System Clock Input Frequency
|
fEXT_CLK
|
EXT_CLK selected
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|
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80
|
MHz
|
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External Low-Power Timer 1 Clock Input Frequency
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fEXT_LPTMR1_CLK
|
LPTMR1_CLK selected
|
|
|
8
|
MHz
|
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External Low-Power Timer 2 Clock Input Frequency
|
fEXT_LPTMR2_CLK
|
LPTMR2_CLK selected
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|
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8
|
MHz
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GENERAL-PURPOSE I/O
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Input Low Voltage for All GPIO Except P3.0 and P3.1
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VIL_VDDIO
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P3.0 and P3.1 can only use VDDIOH as I/O supply and cannot use VDDIO as I/O supply
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VDDIO selected as I/O supply
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0.3 × VDDIO
|
V
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Input Low Voltage for All GPIO
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VIL_VDDIOH
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VDDIOH selected as I/O supply
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|
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0.3 × VDDIOH
|
V
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Input Low Voltage for RSTN
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VIL_RSTN
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0.5 x VDDIOH
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|
V
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Input High Voltage for All GPIO Except P3.0 and P3.1
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VIH_VDDIO
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P3.0 and P3.1 can only use VDDIOH as I/O supply and cannot use VDDIO as I/O supply
|
VDDIO selected as I/O supply
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0.7 × VDDIO
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|
|
V
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Input High Voltage for All GPIO
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VIH_VDDIOH
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VDDIOH selected as I/O supply
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0.7 × VDDIOH
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|
|
V
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Input High Voltage for RSTN
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VIH_RSTN
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0.5 x VDDIOH
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|
V
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Output Low Voltage for All GPIO Except P3.0 and P3.1
|
VOL_VDDIO
|
P3.0 and P3.1 can only use VDDIOH as I/O supply and cannot use VDDIO as I/O supply
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 00, IOL = 1mA
|
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0.2
|
0.4
|
V
|
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VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 01, IOL = 2mA
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0.2
|
0.4
|
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 10, IOL = 4mA
|
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0.2
|
0.4
|
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 11, IOL = 8mA
|
|
0.2
|
0.4
|
|
Output Low Voltage for All GPIO
|
VOL_VDDIOH
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 00, IOL = 1mA
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0.2
|
0.4
|
V
|
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VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 01, IOL = 2mA
|
|
0.2
|
0.4
|
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 10, IOL = 4mA
|
|
0.2
|
0.4
|
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 11, IOL = 8mA
|
|
0.2
|
0.4
|
|
Combined IOL, All GPIO
|
IOL_TOTAL
|
|
|
|
48
|
mA
|
|
Output High Voltage for All GPIO Except P3.0 and P3.1
|
VOH_VDDIO
|
P3.0 and P3.1 can only use VDDIOH as I/O supply and cannot use VDDIO as I/O supply
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 00, IOL = -1mA
|
VDDIO - 0.4
|
|
|
V
|
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 01, IOL = -2mA
|
VDDIO - 0.4
|
|
|
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 10, IOL = -4mA
|
VDDIO - 0.4
|
|
|
|
VDDIO selected as I/O supply, VDDIO = 1.71V, GPIOn_DS_SEL[1:0] = 11, IOL = -8mA
|
VDDIO - 0.4
|
|
|
|
Output High Voltage for All GPIO Except P3.0 and P3.1
|
VOH_VDDIOH
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 00, IOL = -1mA
|
VDDIOH - 0.4
|
|
|
V
|
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 01, IOL = -2mA
|
VDDIOH - 0.4
|
|
|
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 10, IOL = -8mA
|
VDDIOH - 0.4
|
|
|
|
VDDIOH selected as I/O supply, VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] = 11, IOL = -8mA
|
VDDIOH - 0.4
|
|
|
|
Output High Voltage for P3.0 and P3.1
|
VOH_VDDIOH
|
VDDIOH = 1.71V, GPIOn_DS_SEL[1:0] fixed at 00, IOL = -1mA
|
VDDIOH - 0.4
|
|
|
V
|
|
Combined IOH, All GPIO
|
IOH_TOTAL
|
|
|
|
-48
|
mA
|
|
Input Hysteresis (Schmitt)
|
VIHYS
|
|
|
300
|
|
mV
|
|
Input Leakage Current Low
|
IIL
|
VDDIO = 1.89V, VDDIOH = 3.6V, VDDIOH selected as I/O supply, VIN = 0V, internal pullup disabled
|
-100
|
|
+100
|
nA
|
|
Input Leakage Current High
|
IIH
|
VDDIO = 1.89V, VDDIOH = 3.6V, VDDIOH selected as I/O supply, VIN = 3.6V, internal pulldown disabled
|
-800
|
|
+800
|
nA
|
|
IOFF
|
VDDIO = 0V, VDDIOH = 0V, VDDIO selected as I/O supply, VIN < 1.89V
|
-1
|
|
+1
|
μA
|
|
IIH3V
|
VDDIO = VDDIOH = 1.71V, VDDIO selected as I/O supply, VIN = 3.6V
|
-2
|
|
+2
|
|
Input Pullup Resistor RSTN
|
RPU_R
|
Pullup to VDDIOH
|
|
25
|
|
kΩ
|
|
Input Pullup/Pulldown Resistor for All GPIO
|
RPU1
|
Normal resistance, P1M = 0
|
|
25
|
|
kΩ
|
|
RPU2
|
Highest resistance, P1M = 1
|
|
1
|
|
MΩ
|
|
BLUETOOTH RADIO / POWER
|
|
Bluetooth LDO Input Voltage
|
VBLE_LDO_IN
|
|
0.9
|
1.1
|
1.5
|
V
|
|
BLUETOOTH RADIO / FREQUENCY
|
|
Operating Frequency
|
|
1MHz channel spacing
|
2360
|
|
2500
|
MHz
|
|
PLL Programming Resolution
|
PLLRES
|
|
|
1
|
|
MHz
|
|
Frequency Deviation at 1Mbps
|
Δf1MHz
|
|
|
±170
|
|
kHz
|
|
Frequency Deviation at BLE 1Mbps
|
ΔfBLE1MHz
|
|
|
±250
|
|
kHz
|
|
Frequency Deviation at 2Mbps
|
Δf2MHz
|
|
|
±320
|
|
kHz
|
|
Frequency Deviation at BLE 2Mbps
|
ΔfBLE2MHz
|
|
|
±500
|
|
kHz
|
|
BLUETOOTH RADIO / CURRENT CONSUMPTION (SIMO enabled, VREGI = 3.3V. IPO enabled, fSYS_CLK = 100MHz, Bluetooth LE stack running on CM4. Measured at the VREGI device pin, VREGO_B = 0.9V, VREGO_C = 1.0V, RV32 in SLEEP mode.)
|
|
Tx Run Current
|
ITX_+4.5DBM
|
PRF = +4.5dBm
|
|
6.35
|
|
mA
|
|
IRFFE_+4.5DBM
|
|
4.3
|
|
|
ITX_0DBM
|
PRF = 0dBm
|
|
4.17
|
|
|
IRFFE_0DBM
|
|
2.12
|
|
|
ITX_-10DBM
|
PRF = -10dBm
|
|
3.65
|
|
|
IRFFE_-10DBM
|
|
1.65
|
|
|
Tx Startup Current
|
ISTART_TX
|
|
|
2.05
|
|
mA
|
|
BLUETOOTH RADIO / CURRENT CONSUMPTION (SIMO enabled, VREGI = 3.3V. IPO Enabled, fSYS_CLK = 100MHz, BLE stack running on CM4. Measured at the VREGI device pin, VREGO_B = 0.9V, VREGO_C = 1.0V, RV32 in SLEEP mode)
|
|
Rx Run Current
|
IRX_1M
|
fRX = 1Mbps
|
|
4.0
|
|
mA
|
|
IRX_2M
|
fRX = 2Mbps
|
|
4.12
|
|
|
IRFFE_1M
|
fRX = 1Mbps
|
|
1.95
|
|
|
IRFFE_2M
|
fRX = 2Mbps
|
|
2.07
|
|
|
Rx Startup Current
|
ISTART_RX
|
|
|
2.05
|
|
mA
|
|
BLUETOOTH RADIO / TRANSMITTER
|
|
Maximum Output Power
|
PRF
|
|
|
+4.5
|
|
dBm
|
|
RF Power Accuracy
|
PRF_ACC
|
|
|
±1
|
|
dB
|
|
First Adjacent Channel Transmit Power ±2MHz
|
PRF1_1
|
1Mbps Bluetooth LE
|
|
-30.5
|
|
dBc
|
|
First Adjacent Channel Transmit Power ±4MHz
|
PRF2_1
|
1Mbps Bluetooth LE
|
|
-40
|
|
dBc
|
|
BLUETOOTH RADIO / RECEIVER
|
|
Maximum Received Signal Strength at < 0.1% PER
|
PRX_MAX
|
|
|
0
|
|
dBm
|
|
Receiver Sensitivity, Ideal Transmitter
|
PSENS_IT
|
Measured with 37 byte payload
|
1Mbps Bluetooth LE
|
|
-97.5
|
|
dBm
|
|
2Mbps Bluetooth LE
|
|
-94
|
|
|
Receiver Sensitivity, Dirty Transmitter
|
PSENS_DT
|
Measured with 37 byte payload
|
1Mbps Bluetooth LE
|
|
-95.5
|
|
dBm
|
|
2Mbps Bluetooth LE
|
|
-93
|
|
|
Receiver Sensitivity, Long Range Coded
|
PSENS_LR
|
Measured with 37 Byte Payload
|
125kbps Bluetooth LE
|
|
-105.5
|
|
dBm
|
|
500kbps Bluetooth LE
|
|
-101
|
|
|
C/I Cochannel
|
C/I1MHz
|
1Mbps Bluetooth LE
|
|
6.7
|
|
dB
|
|
C/I2Mhz
|
2Mbps Bluetooth LE
|
|
7
|
|
|
Adjacent Interference
|
C/I+1_1
|
+1MHz offset, 1Mbps Bluetooth LE
|
|
-2.5
|
|
dBm
|
|
C/I-1_1
|
-1MHz offset, 1Mbps Bluetooth LE
|
|
-2.6
|
|
|
C/I+2_1
|
+2MHz offset, 1Mbps Bluetooth LE
|
|
-22
|
|
dB
|
|
C/I-2_1
|
-2MHz offset, 1Mbps Bluetooth LE
|
|
-24
|
|
|
C/I+2_2
|
+2MHz offset, 2Mbps Bluetooth LE
|
|
-2
|
|
|
C/I-2_2
|
-2MHz offset, 2Mbps Bluetooth LE
|
|
-3
|
|
|
C/I+4_2
|
+4MHz offset, 2Mbps Bluetooth LE
|
|
-32
|
|
|
C/I-4_2
|
-4MHz offset, 2Mbps Bluetooth LE
|
|
-34
|
|
|
Adjacent Interference, (3+n) MHz Offset [n = 0, 1, 2, . . .]
|
C/I3+MHZ
|
1Mbps Bluetooth LE
|
|
-34.5
|
|
dB
|
|
Adjacent Interference, (6+2n) MHz Offset [n = 0, 1, 2, . . .]
|
C/I6+MHZ
|
2Mbps Bluetooth LE
|
|
-34
|
|
dB
|
|
Intermodulation Performance, 1Mbps Bluetooth LE with 3MHz, 4MHz, 5MHz Offset
|
PIMD_1MBPS
|
1Mbps Bluetooth LE
|
|
-38
|
|
dBm
|
|
Intermodulation Performance, 2Mbps Bluetooth LE with 6MHz, 8MHz, 10MHz Offset
|
PIMD_2MBPS
|
2Mbps Bluetooth LE
|
|
-38
|
|
dBm
|
|
Received Signal Strength Indicator Accuracy
|
RSSIACC
|
|
|
±3
|
|
dB
|
|
Received Signal Strength Indicator Range
|
RSSIRANGE
|
|
|
-98 to -50
|
|
dB
|
|
ADC (SIGMA-DELTA)
|
|
Resolution
|
|
|
|
10
|
|
Bits
|
|
ADC Clock Rate
|
fACLK
|
|
0.1
|
|
8
|
MHz
|
|
ADC Clock Period
|
tACLK
|
|
|
1/fACLK
|
|
μs
|
|
Input Voltage Range
|
VAIN
|
AIN[7:0], ADC_DIVSEL = [00], ADC_CH_SEL = [7:0]
|
REF_SEL = 0, INPUT_SCALE = 0
|
VSSA + 0.05
|
|
VBG
|
V
|
|
AIN[7:0], ADC_DIVSEL = [01], ADC_CH_SEL = [7:0]
|
REF_SCALE = 0, INPUT_SCALE = 0
|
VSSA + 0.05
|
|
2 x VBG
|
|
AIN[7:0], ADC_DIVSEL = [10], ADC_CH_SEL = [7:0]
|
REF_SCALE = 0, INPUT_SCALE = 0, VDDIOH selected as the I/O supply
|
VSSA + 0.05
|
|
VDDIOH
|
|
AIN[7:0], ADC_DIVSEL = [11], ADC_CH_SEL = [7:0]
|
REF_SEL = 0, INPUT_SCALE = 0, VDDIOH selected as the I/O supply
|
VSSA + 0.05
|
|
VDDIOH
|
|
Input Impedance
|
RAIN
|
|
|
30
|
|
kΩ
|
|
Analog Input Capacitance
|
CAIN
|
Fixed capacitance to VSSA
|
|
1
|
|
pF
|
|
Dynamically switched capacitance
|
|
250
|
|
fF
|
|
Integral Nonlinearity
|
INL
|
Measured at +25°C
|
|
|
±2
|
LSb
|
|
Differential Nonlinearity
|
DNL
|
Measured at +25°C
|
|
|
±1
|
LSb
|
|
Offset Error
|
VOS
|
|
|
±1
|
|
LSb
|
|
ADC Active Current
|
IADC
|
ADC active, reference buffer enabled, input buffer disabled
|
|
102
|
|
µA
|
|
ADC Setup Time
|
tADC_SU
|
Any power-up of ADC clock or ADC bias to CpuAdcStart
|
|
|
10
|
µs
|
|
ADC Output Latency
|
tADC
|
|
|
1067
|
|
tACLK
|
|
ADC Sample Rate
|
fADC
|
|
|
|
7.8
|
ksps
|
|
ADC Input Leakage
|
IADC_LEAK
|
ADC inactive or channel not selected
|
|
10
|
|
nA
|
|
Full-Scale Voltage
|
VFS
|
ADC code = 0x3FF
|
|
1.2
|
|
V
|
|
Bandgap Temperature Coefficient
|
VTEMPCO
|
Box method
|
|
30
|
|
ppm
|
|
COMPARATORS
|
|
Input Offset Voltage
|
VOFFSET
|
|
|
±1
|
|
mV
|
|
Input Hysteresis
|
VHYST
|
AINCOMPHYST[1:0] = 00
|
|
±23
|
|
mV
|
|
AINCOMPHYST[1:0] = 01
|
|
±50
|
|
|
AINCOMPHYST[1:0] = 10
|
|
±2
|
|
|
AINCOMPHYST[1:0] = 11
|
|
±7
|
|
|
Input Voltage Range
|
VIN_CMP
|
Common-mode range
|
0.6
|
|
1.35
|
V
|
|
FLASH MEMORY
|
|
Flash Erase Time
|
tM_ERASE
|
Mass erase
|
|
20
|
|
ms
|
|
tP_ERASE
|
Page erase
|
|
20
|
|
|
Flash Programming Time per Word
|
tPROG
|
|
|
42
|
|
μs
|
|
Flash Endurance
|
|
|
10
|
|
|
kcycles
|
|
Data Retention
|
tRET
|
TA = +105°C
|
10
|
|
|
years
|
