Functional Diagram
Functional Diagrams
MAX25608 Block Diagram
DRAIN12
DRAIN12
DRAIN11
DRAIN11
DRAIN10
DRAIN10
DRAIN9
DRAIN9
DRAIN8
DRAIN8
DRAIN7
DRAIN7
Source of Internal Switch 7.
SRC7
SRC7
DRAIN6
DRAIN6
DRAIN5
DRAIN5
DRAIN4
DRAIN4
DRAIN3
DRAIN3
DRAIN2
DRAIN2
DRAIN1
DRAIN1
Connect external bypass capacitor to GND.
IN
IN
LED Binning Resistor Connection. Connect a LED binning resistor from this pin to GND.
RGRADE
RGRADE
MAX25608
MAX25608
REGISTERS AND CONTROL LOGIC
REGISTERS
AND
CONTROL
LOGIC
LEVEL SHIFTER
LEVEL
SHIFTER
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
LED Binning Resistor Connection. Connect a LED binning resistor from this pin to GND.
RGRADE
R
GRADE
Source of Internal Switch 1.
SRC1
SRC1
Charge Pump Capacitor Positive Connection. Connect a 0.1µF ceramic capacitor from CPP to CPN.
CPP
CPP
CHARGE PUMP
CHARGE
PUMP
CLK Input. Can be optionally used to sync the device with an external digital clock signal.
CLKIN
CLKIN
Charge Pump Capacitor Negative Connection. Connect a 0.1µF from CPP to CPN.
CPN
CPN
LDO
LDO
Open-Drain Fault Indicator. Goes low when a fault condition is present.
FLT
FLT
CCP
C
CP
After startup, can be optionally configured with UART to drive a clock signal to other devices, or act as a pass-through for the CLKIN input.
CLKOUT
CLKOUT
Device ID Resistor. Connect a resistor value from RADDR to GND to set the UART Device ID.
RADDR
RADDR
Device ID Resistor. Connect a resistor value from RADDR to GND to set the UART Device ID.
RADDR
R
ADDR
NTC Divider ADC Input. Connect to NTC resistor divider to enable remote temperature sensing.
RTEMP
RTEMP
UART Receive Input. If the driver to this pin is CMOS output, no pull-up resistor is needed. If the driver to this pin is open drain, add a 1.5kΩ pull-up resistor.
RX
RX
UART Transmit Output. Add a 1.5kΩ pull-up resistor.
TX
TX
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LDO Output. Nominal voltage is 1.8V. Connect a bypass capacitor between VDD and GND.
VDD
V
DD
CVDD
C
VDD
CIN
C
IN
ADC
ADC
ADC
ADC
ADC
ADC
LDO Output. Nominal voltage is 1.8V. Connect a bypass capacitor between VDD and GND.
VDD
V
DD
NTC
NTC
EP
EP
OSCILLATOR (SPREAD SPECTRUM ENABLED)
OSCILLATOR
(SPREAD
SPECTRUM
ENABLED)
INTERNAL_CLK
INTERNAL_CLK
INTERNAL_CLK
INTERNAL_CLK
PWM_CLK
PWM_CLK
PWM_CLK_SEL
PWM_CLK_SEL
MUX
MUX
DIVIDER
DIVIDER
MAX25608B Block Diagram
DRAIN12
DRAIN12
DRAIN11
DRAIN11
DRAIN10
DRAIN10
DRAIN9
DRAIN9
DRAIN8
DRAIN8
DRAIN7
DRAIN7
Source of Internal Switch 7.
SRC7
SRC7
DRAIN6
DRAIN6
DRAIN5
DRAIN5
DRAIN4
DRAIN4
DRAIN3
DRAIN3
DRAIN2
DRAIN2
DRAIN1
DRAIN1
Connect external bypass capacitor to GND.
IN
IN
LED Binning Resistor Connection. Connect a LED binning resistor from this pin to GND.
RGRADE
RGRADE
MAX25608B
MAX25608B
REGISTERS AND CONTROL LOGIC
REGISTERS
AND
CONTROL
LOGIC
LEVEL SHIFTER
LEVEL
SHIFTER
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
LED Binning Resistor Connection. Connect a LED binning resistor from this pin to GND.
RGRADE
R
GRADE
Source of Internal Switch 1.
SRC1
SRC1
Charge Pump Capacitor Positive Connection. Connect a 0.1µF ceramic capacitor from CPP to CPN.
CPP
CPP
CHARGE PUMP
CHARGE
PUMP
CLK Input. Can be optionally used to sync the device with an external digital clock signal.
CLKIN
CLKIN
Charge Pump Capacitor Negative Connection. Connect a 0.1µF from CPP to CPN.
CPN
CPN
LDO
LDO
Open-Drain Fault Indicator. Goes low when a fault condition is present.
FLT
FLT
CCP
C
CP
After startup, can be optionally configured with UART to drive a clock signal to other devices, or act as a pass-through for the CLKIN input.
CLKOUT
CLKOUT
Device ID Resistor. Connect a resistor value from RADDR to GND to set the UART Device ID.
RADDR
RADDR
Device ID Resistor. Connect a resistor value from RADDR to GND to set the UART Device ID.
RADDR
R
ADDR
NTC Divider ADC Input. Connect to NTC resistor divider to enable remote temperature sensing.
RTEMP
RTEMP
UART Receive Input. If the driver to this pin is CMOS output, no pull-up resistor is needed. If the driver to this pin is open drain, add a 1.5kΩ pull-up resistor.
RX
RX
UART Transmit Output. Add a 1.5kΩ pull-up resistor.
TX
TX
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LDO Output. Nominal voltage is 1.8V. Connect a bypass capacitor between VDD and GND.
VDD
V
DD
CVDD
C
VDD
CIN
C
IN
ADC
ADC
ADC
ADC
ADC
ADC
LDO Output. Nominal voltage is 1.8V. Connect a bypass capacitor between VDD and GND.
VDD
V
DD
NTC
NTC
EP
EP
OSCILLATOR (SPREAD SPECTRUM DISABLED)
OSCILLATOR
(SPREAD
SPECTRUM
DISABLED)
INTERNAL_CLK
INTERNAL_CLK
INTERNAL_CLK
INTERNAL_CLK
PWM_CLK
PWM_CLK
PWM_CLK_SEL
PWM_CLK_SEL
MUX
MUX
DIVIDER
DIVIDER
HALF DUPLEX
HALF DUPLEX
MAX25608C Block Diagram
DRAIN12
DRAIN12
DRAIN11
DRAIN11
DRAIN10
DRAIN10
DRAIN9
DRAIN9
DRAIN8
DRAIN8
DRAIN7
DRAIN7
Source of Internal Switch 7.
SRC7
SRC7
DRAIN6
DRAIN6
DRAIN5
DRAIN5
DRAIN4
DRAIN4
DRAIN3
DRAIN3
DRAIN2
DRAIN2
DRAIN1
DRAIN1
Connect external bypass capacitor to GND.
IN
IN
LED Binning Resistor Connection. Connect a LED binning resistor from this pin to GND.
RGRADE
RGRADE
MAX25608C
MAX25608C
REGISTERS AND CONTROL LOGIC
REGISTERS
AND
CONTROL
LOGIC
LEVEL SHIFTER
LEVEL
SHIFTER
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
VDRV
V
DRV
N
N
LED Binning Resistor Connection. Connect a LED binning resistor from this pin to GND.
RGRADE
R
GRADE
Source of Internal Switch 1.
SRC1
SRC1
Charge Pump Capacitor Positive Connection. Connect a 0.1µF ceramic capacitor from CPP to CPN.
CPP
CPP
CHARGE PUMP
CHARGE
PUMP
CLK Input. Can be optionally used to sync the device with an external digital clock signal.
CLKIN
CLKIN
Charge Pump Capacitor Negative Connection. Connect a 0.1µF from CPP to CPN.
CPN
CPN
LDO
LDO
Open-Drain Fault Indicator. Goes low when a fault condition is present.
FLT
FLT
CCP
C
CP
After startup, can be optionally configured with UART to drive a clock signal to other devices, or act as a pass-through for the CLKIN input.
CLKOUT
CLKOUT
Device ID Resistor. Connect a resistor value from RADDR to GND to set the UART Device ID.
RADDR
RADDR
Device ID Resistor. Connect a resistor value from RADDR to GND to set the UART Device ID.
RADDR
R
ADDR
NTC Divider ADC Input. Connect to NTC resistor divider to enable remote temperature sensing.
RTEMP
RTEMP
UART Receive Input. If the driver to this pin is CMOS output, no pull-up resistor is needed. If the driver to this pin is open drain, add a 1.5kΩ pull-up resistor.
RX
RX
UART Transmit Output. Add a 1.5kΩ pull-up resistor.
TX
TX
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
DRIVER WITH FAULT DETECTION
DRIVER WITH
FAULT DETECTION
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LEVEL SHIFTER
LEVEL
SHIFTER
LDO Output. Nominal voltage is 1.8V. Connect a bypass capacitor between VDD and GND.
VDD
V
DD
CVDD
C
VDD
CIN
C
IN
ADC
ADC
ADC
ADC
ADC
ADC
LDO Output. Nominal voltage is 1.8V. Connect a bypass capacitor between VDD and GND.
VDD
V
DD
NTC
NTC
EP
EP
OSCILLATOR (SPREAD SPECTRUM DISABLED)
OSCILLATOR
(SPREAD
SPECTRUM
DISABLED)
INTERNAL_CLK
INTERNAL_CLK
INTERNAL_CLK
INTERNAL_CLK
PWM_CLK
PWM_CLK
PWM_CLK_SEL
PWM_CLK_SEL
MUX
MUX
DIVIDER
DIVIDER
