Detailed Description

The MAX25512 is a 4-channel backlight driver IC with integrated boost converter for automotive displays. The integrated current outputs can each sink up to 120mA LED current. The device accepts a wide 3V to 36V input volt­age range. The IC provides load-dump voltage protection up to 40V in automotive applications and incorporates three major blocks: a DC-DC converter with peak current-mode control to implement a boost or SEPIC-type switched-mode power supply, a 4-channel LED driver with up to 120mA constant-current sink capability per channel, and a logic control block.

The internal current-mode switching DC-DC converter supports boost or SEPIC topologies and operates in the 400kHz to 2.2MHz frequency range. Optional spread spectrum helps reduce EMI. An adaptive output-voltage-control scheme minimizes power dissipation in the LED current-sink paths.

The device tracks the external pulse-width-modu­lation (PWM) dimming input on DIM. The minimum pulse width is 300ns. Phase-shifted dimming of the strings is selectable for lower EMI.

Comprehensive diagnostic and protection features are implemented. The MAX25512 features an I²C interface for enhanced control and diagnostics.

The internal regulator is enabled when the EN pin is high. To shut down the device, drive EN low. The current consumption reduces to μA levels.

The internal low dropout (LDO) regulator converts the input voltage at IN to a 1.8V output voltage at V18. The LDO regulator supplies current to the internal control circuitry and the gate driver.

The IC features two undervoltage lockouts (UVLOs) that monitor the input voltage at IN and the output of the internal LDO regulator at V18. The device turns on when EN is taken high, and the boost converter can be enabled if both IN and V18 are higher than their respective UVLO thresholds.

After startup, the device can operate down to 3V as described in the Low-Voltage Operation section.

After the boost soft-start is complete, the MAX25512 continues to operate with IN voltages as low as 3V.

At very low input voltages, the efficiency of the boost converter reduces, and the input current can reach very high levels as a consequence. When the input voltage falls below V_LVF, the boost converter current limit is automatically increased to I_LIMLV, and the switching frequency is reduced if it is greater than 1.4MHz. In this mode, if the standard current limit (I_LIM) is exceeded on four consecutive cycles, a 100ms timer is started. This returns the current limit to I_LIM when it expires. When the input voltage returns above V_LVR, operation at the normal switching frequency is resumed.

The external boost converter components must be selected for worst-case operation. An alternative is to reduce the output power at low input voltages.

If the voltage at IN drops below the undervoltage lockout level (V_INUVF) at any time, the boost converter is disabled.

To disable an unused LED string, connect the unused OUT_ to ground through a 10kΩ resistor, or set the corresponding DIS_ bit to 1 in the DISABLE (0x13) register before the ENA bit is set. During startup, the device sources 60μA (typ) current through the OUT_ pins and measures the corresponding voltage. For the string to be properly disabled, the OUT_ voltage should measure between 270mV and 0.775V during this check. 270mV is the maximum threshold for the OUT_ short-to-ground check, and 0.775V is the minimum unused string-detection threshold.

Note: When disabling unused strings, it is necessary to start by disabling the highest numbered current sinks first (e.g., if two strings need to be disabled, disable OUT4 and OUT3. Do not disable any two strings at random). During normal operation, strings can be selectively turned off by changing the corresponding TON_ setting to 0. This is only possible when internal dimming is used, not when using the DIM input pin.

The IC has a constant-frequency, current-mode controller designed to drive the LEDs in a boost or SEPIC configuration. The IC features multi-loop control to regulate the peak current in the inductor, as well as the voltage across the LED current sinks, to minimize power dissipation.

The internal MOSFET is turned on at the beginning of every switching cycle. The inductor current ramps up linearly until it is turned off at the peak current level set by the feedback loop. The peak inductor current is sensed internally, and slope compensation is added.

The IC features leading-edge blanking to suppress the MOSFET switching noise. A PWM comparator compares the current-sense voltage plus the slope-compensation signal with the output of the transconductance error amplifier. The controller turns off the MOSFET when the total current-sense voltage exceeds the error amplifier’s output voltage, which is also the voltage on the COMP pin. This process repeats every switching cycle to achieve peak current-mode control.

In addition to the peak current-mode-control loop, the IC has two other feedback loops for control. The converter output voltage is sensed through the BSTMON input, which goes to the inverting input of the error amplifier. The other feedback comes from the OUT_ current sinks. This loop controls the headroom of the current sinks to minimize total power dissipation while still ensuring accurate LED current matching. Each current sink has a window comparator with a low threshold of V_OUTL and a high threshold of V_OUTH. The outputs of these comparators control an up/down counter. The up/down counter is updated on every falling edge of the DIM input and drives a 9-bit DAC that sets the reference to the error amplifier. When dimming is set to 100%, the counter is updated at intervals of 10ms.

The error amplifier’s reference input is controlled with an 9-bit digital-to-analog converter (DAC). The DAC output is ramped up slowly during startup to implement a soft-start function (see the Startup Sequence section). During normal operation, the DAC output range is limited to 0.48V to 1V. Because the DAC output is limited to no less than 0.48V during normal operation, the overvoltage threshold for the output should be set to a value less than twice the minimum LED forward voltage. The DAC LSB determines the minimum step in output voltage according to the equation:

V_{STEP_MIN} = V_{DAC_LSB} × A_OVP

where,

V_{STEP_MIN} = Minimum output-voltage step

V_{DAC_LSB} = DAC least significant bit size (1.95mV)

A_OVP = BSTMON resistor-divider gain (1 + R6/R7)

The full-scale sink current for the outputs (OUT1–OUT4) is set using the resistor on the ISET pin. Use the following equation to calculate the resistor value:

${\text{R}}_{\mathrm{ISET}}=\frac{1500}{I_{\mathrm{LED}}}$

where I_LED is the individual OUT_ current.

If the R_ISET value is less than 11.9kΩ, the device may not operate.

When PWM dimming is used, the current in the OUT_ channels switches between zero and the full-scale sink current at the set duty cycle.

Dimming can be performed using an external PWM signal applied to the DIM pin or by writing to the TON_ registers. The signal on the DIM pin is sampled with a 20MHz internal clock except when phase-shifting is disabled, in which case, the DIM signal controls the OUT_ outputs directly.

The device tracks frequency changes in the external pulse-width-modu­lation (PWM) dimming input on DIM in phase-shift mode.

The IC's operation changes at very narrow dimming pulses to ensure a consistent dimming response of the LEDs. If the dimming on-time is lower than 50μs (typ), the device enters low-dimming mode. In this state, the converter switches continuously, and LED short detection is disabled. When the DIM input is greater than 51μs (typ), the device goes back into normal operation, enabling the short-LED detection and switching the power FET only when the effective dimming signal is high.

By setting the BSTFORCE bit in the ISET_REG register to 1, it is possible to force the boost converter to run continuously independent of the state of the DIM input.

The device can be configured to perform a smooth change in brightness, even when the DIM input duty cycle or TON_ setting is suddenly changed by setting the FADE_IN_OUT bit in the FADING_REG register to 1.

When using the fade function, it is important to maintain the DIM frequency constant while entering and leaving 100% duty cycle. This is necessary in order to avoid erroneous frequency measurement that can change the speed of the fade-in/out.

The step size in the dimming transition is either 6.25% or 12.5% depending on the setting of the FADE_GAIN bit. The total transition time can be set by writing the TDIM field to a value between 0 to 5, where the value sets the update speed to once every 2^TDIM. The transition time depends on the initial and final dimming values according to:

$t=\frac{1}{f_{\mathrm{DIM}}}\times 2^{\mathrm{TDIM}}\times \frac{\ln \left({\mathrm{DIM}}_F\right)-\ln \left({\mathrm{DIM}}_i\right)}{\mathrm{FADE\_GAIN}}$

where f_DIM is the dimming frequency, TDIM is the TDIM register setting, DIM_F is the final dimming setting, DIM_i is the initial dimming setting, and FADE_GAIN is either 0.0625 or 0.125. For this equation, DIM_F should be larger than DIM_i but, since the fading function is symmetrical, the values can be swapped if the final dimming ratio is lower than the initial one.

When transitioning to 100% dimming with fading enabled, do not change the input dimming from 100% until the complete fading transition to 100% is complete. Use the above equation to determine the transition time.

In hybrid dimming mode, the external LEDs are dimmed by first reducing their current as the dimming duty-cycle decreases from 100% (see Figure 2). At the crossover level set by the HDIM_THR_1_0[1:0] bits (50%, 25%, 12.5% or 6.25%), dimming transitions to PWM dimming where the LED current is chopped. To select hybrid dimming, set the HDIM bit in the IMODE (0x03) register. Select the desired crossover level between analog and PWM dimming using the HDIM_THR_1_0[1:0] bits in the same register. Depending on the DIM_EXT bit, the device functions in one of the following two ways:

1. (DIM_EXT = 1) measures the duty cycle on the DIM pin and translates it into a combined LED current value and PWM setting.
2. (DIM_EXT = 0) takes the 18-bit value from the TON1 register and translates it into a combined LED current value and PWM setting.

When hybrid dimming is used with an internal dimming setting (DIM_EXT = 0), only the value TON1[17:0] is used. It is not possible to have individual dimming settings for each channel in this mode.

Note that when hybrid dimming is enabled, the ADIM register has no effect.

Figure 3 illustrates the difference between standard and hybrid dimming with phase-shifting enabled.

The third stage begins once stage 2 is complete, and the DIM input goes high. During stage 3, the output of the converter is adjusted until the minimum OUT_ voltage falls between the V_OUTH and V_OUTL comparator limits. The output adjustment is again controlled by the DAC, which provides the reference for the error amplifier. The DAC output is updated on each rising edge of the DIM input pin. If the DIM input is at 100% duty cycle (DIM = high), the DAC output is updated once every 10ms.

The total soft-start time can be calculated using:

$$\begin{gathered} t_{\mathrm{SS}}=52\mathrm{ms}+ \\ \frac{(V_{\mathrm{LED}}+0.715)-(0.48\times A_{\mathrm{OVP}})}{f_{\mathrm{DIM}}\times 0.00975\times A_{\mathrm{OVP}}} \end{gathered}$$

where,

t_SS = Total soft-start time

52ms = Fixed stage 1 + stage 2 duration

V_LED = Total forward voltage of the LED strings

0.715V = Midpoint of the window comparator

f_DIM = Dimming frequency (use 100Hz for f_DIM when input duty cycle is 100%)

0.00975V = 5 times the 1.95mV LSB of the DAC

A_OVP = Gain of the BSTMON resistor-divider or 1 + R6/R7, and

0.48V = Voltage on BSTMON after stage 2

If fast soft-start is enabled, the soft-start is accelerated, and the final value of the voltage on the BSTMON pin is 0.88V. The equation for the total soft-start time then becomes:

$$\begin{gathered} t_{\mathrm{SS}}=27\mathrm{ms}+ \\ \frac{(0.88\times A_{\mathrm{OVP}})-(V_{\mathrm{LED}}+0.715)}{f_{\mathrm{DIM}}\times 0.00975\times A_{\mathrm{OVP}}} \end{gathered}$$

After the soft-start period, a fault is detected whenever the BSTMON pin falls below V_{BST_UVF}.

The internal oscillator frequency is programmable between 400kHz and 2.2MHz using a timing resistor (R_RT) connected from the RT pin to GND. Use the following equation to calculate the value of R_RT for the desired switching frequency (f_SW).

$R_{\mathrm{RT}}=\frac{26.4\times {10}^6}{f_{\mathrm{SW}}}-0.32$

where R_RT is in kΩ and f_SW is in Hz. For example, a 12kΩ resistor on pin RT sets a switching frequency of 2.14MHz.

If the value of the RT resistor is out of range or the pin is shorted to GND, the boost converter cannot start when the ENA bit is set to 1; the RTOOR bit is set, and the FLTB pin goes low.

Synchronize the oscillator with an external clock by AC-coupling the external clock to the RT input. The value of the capacitor used for AC-coupling is C_SYNC = 10pF. The duty cycle of the external clock should be 50%. When synchronizing the converter, do not apply the synchronizing signal to the RT pin at start-up as this may cause the RT resistor value check to fail.

At low input voltages, and when the switching frequency is above 1.4MHz, the switching frequency is automatically reduced by 30% to enable high-duty-cycle operation and maintain output voltage regulation. This also applies when the device is synchronized to an external frequency.

The IC includes spread spectrum that reduces peak electromagnetic interference (EMI) at the switching frequency and its harmonics. Spread spectrum can be enabled and disabled using the SS_OFF bit in the register SETTING_REG.

Spread spectrum uses a pseudorandom dithering technique where the switching frequency is varied in the range 94% to 106% or 96% to 104% of the programmed switching frequency set through the external resistor from RT to GND.

Spread spectrum is disabled if external synchronization is used.

After the soft-start of the boost converter, the IC detects open-LED strings and disconnects any such strings from the internal minimum OUT_ voltage detector. This keeps the DC-DC converter output voltage within safe limits and maintains high efficiency.

During normal operation, the DC-DC converter output-regulation loop uses the minimum OUT_ voltage as the feedback input. If any LED string is open, the voltage at the opened OUT_ goes to V_LEDGND. The DC-DC converter output voltage then increases to the overvoltage-protection threshold set by the voltage-divider network connected between the converter output, the BSTMON input, and GND. The overvoltage-protection threshold at the DC-DC converter output is determined using the following equation:

$V_{\mathrm{OUT\_BSTMON}}=0.95\times \left(1+\frac{R6}{R7}\right)$

where 0.95V (typ) is the overvoltage threshold on BSTMON (see the Functional Diagram). Select V_{OUT_BSTMON} according to the following formula:

$$\begin{gathered} 1.1x(V_{\mathrm{LED\_MAX}}+0.875) \\ <V_{\mathrm{OUT\_BSTMON}}<2x(V_{\mathrm{LED\_MIN}}+0.55) \end{gathered}$$

where,

V_{LED_MAX} = Maximum expected LED string voltage

V_{LED_MIN} = Minimum expected LED string voltage

Select R6 and R7 so that the voltage at OUT_ does not exceed the absolute maximum rating. As soon as the DC-DC converter output reaches the overvoltage-protection threshold, the internal MOSFET is switched off.

The overvoltage threshold should be set to less than twice the minimum LED voltage to ensure proper operation and so that the BSTMON minimum regulation point of 0.48V (typ) is not breached. When an open-LED overvoltage condition occurs, FLTB is latched low. Any current-sink output with V_{OUT_} < V_OOL is permanently disconnected from the minimum voltage detector.

The IC checks for shorted LEDs after the current in any channel is turned on. A shorted-LED is detected at OUT_ if the following condition is met.

$V_{\mathrm{OUT\_}}>V_{\mathrm{SLDET}}$

where V_SLDET = 12x the voltage set on the RSDT pin or when the RSDT pin is connected to V18, the value set by the SLDET[1:0] bits in the SETTING (0x12) register.

If a short is detected on any of the strings, the affected LED strings are disconnected, and the FLTB output flag asserts low until the device detects that the shorts are removed. Disable short-LED detection by connecting RSDT to V18 with SLDET[1:0] set to 0x0. Short-LED detection is disabled in low-dimming mode.

In external dimming mode with the DIM input connected continuously high, the OUT_ pins are periodically scanned to detect shorted LEDs. The scan frequency is 100Hz. Similarly, when DIM_EXT = 0 and internal dimming is used, shorted LEDs are still detected by periodically scanning the OUT_ states at 100Hz.

When an NTC temperature sensor is connected between GND and a resistor (RT1) connected to the V18 supply, with a further resistor (RT2) connected from the junction of the NTC and RT1 to the TEMP pin, temperature foldback is implemented. When the temperature reaches the temperature T1 (set by RT1), the current in the LEDs is reduced according to the linear scheme shown in Figure 5. The slope of the current reduction is set nominally by RT2. The MAX25512 is designed to be used with the NTCLE100E3103*B0 or a similar NTC device. Table 1 illustrates some examples of values of RT1 and RT2 to obtain certain values of T1 and T_DELTA.