Detailed Description

The MAX25432 is a single-chip USB PD charging and protection solution with PPS for multimedia hub, rear-seat entertainment module, and head-unit applications. Combined with either a microcontroller or a USB PD controller it is a two-chip solution for dedicated charging module applications. The MAX25432 provides all the functionality for USB PD car battery to V_BUS regulation, configuration channel communication, and USB 2.0 Hi-Speed protection. It can optionally provide BC1.2 host charge emulation. The device integrates all of the protection needed in an automotive application for a USB PD application.

The MAX25432 offers the design engineer two options for firmware development. The MAX25432B can operate with a system-on-chip (SoC), USB hub IC, or microcontroller, whereas the MAX25432A is designed to operate with a USB PD controller. The MAX25432 evaluation (EV) kit offers a platform where the design engineer can begin early firmware development.

Recent advancements in the automotive infotainment market demand high-efficiency and low footprint power delivery solutions. The push for lower BOM cost has driven USB power applications to integrate more features and responsibilities into a single IC. The proliferation of USB PD-based battery-powered portable devices has resulted in an increase in the number of USB ports in an automobile to charge the passenger's devices. These multiport charging modules can unnecessarily increase per-port cost when a dedicated MCU with firmware is used for each port. The MAX25432B minimizes per-port cost by using a single microcontroller as a USB Type-C policy manager (TCPM) that is operating as a master, and multiple USB Type-C port controllers (TCPCs) operating as slaves. The TCPM and TCPC communicate with each other using I²C.

The MAX25432B is an advanced automotive integrated USB PD solution that combines the TCPC along with other USB features such as Type-C, PD with PPS, BC1.2, Apple, and Samsung® charging port emulator. All MAX25432 devices implement Analog Devices' proprietary current-mode buck-boost H-bridge controller that can achieve a target USB output voltage with high-efficiency while operating over a wide range of input voltage. The MAX25432 buck-boost controller has robust protection mechanisms such as overvoltage (OV), undervoltage (UV), overcurrent, short-to-ground (STG), short-to-battery, overtemperature, and automotive ESD protections. The MAX25432 implements internal gate drivers to drive external power FETs to accommodate high-power USB requirements. The MAX25432 has an intelligent voltage-adjustment circuit that can adjust the output voltage of the buck-boost converter such that the voltage on the USB receptacle is within specifications regardless of the output current.

All MAX25432 devices have integrated data and CC switches that protect the upstream USB transceiver and/or PD controller from high-voltage events on the cable or the receptacle. All devices also have an integrated V_CONN switch to supply power on one of the unused CC pins in different configurations. The high-voltage DP/DM pins (HVDP/HVDM) and CC pins (HVCC1/HVCC2) are monitored and protected for OV conditions such as ESD or short-to-battery/V_BUS events. Based on the configuration requested by the TCPM, the MAX25432B has the capability to source different currents on the HVCC pins for a Type-C interface. The MAX25432B also supports biphase mark coding (BMC) communication using integrated USB PD AFE circuits with remote ground offset sensing for long captive cables.

• Integrated buck-boost DC-DC controller with drivers for four external MOSFETs in an H-bridge configuration
  • 4.5V to 36V (40V load-dump) input voltage allows operation in “warm-crank” and start/stop conditions
  • USB PD with PPS
    • 10mV V_BUS voltage step size from 3.3V to 21V
    • 25mA V_BUS current-limit step size from 1.0A to 6.35A
  • Four switching frequency options for scalable efficiency, adjustable EMI interference avoidance and power optimization including 220kHz, 300kHz, 400kHz, and 2.2MHz
  • Forced-PWM at light or no-load conditions for reduced EMI through USB cable
  • Spread-spectrum option for EMI reduction
  • SYNC input and SYNC output for frequency parking and multiport applications
  • Reduced inrush current with soft-start
  • Thermal shutdown
• Integrated USB PD V_BUS features
  • USB PD PPS compliant
  • Programmable V_BUS overcurrent protection limits
    • Apple MFi R3x compatible
  • Programmable V_BUS undervoltage protection limits
  • Programmable V_BUS overvoltage protection limits
  • Digital voltage scaling (DVS) for smooth, predictable voltage transitions
  • Integrated USB V_BUS discharge
• Integrated output voltage adjustment for cable voltage drop on captive-cable applications
  • Programmable voltage gain up to 3m/up to 516mΩ cable resistance
• 1MHz I²C slave Interface with ALERT pin
  • TCPCI-compliant register set
  • MAX25432-specific registers for alerts, advanced diagnostics, and management
  • Maskable alerts for application-specific behavior
  • Selectable I²C address for multiport applications
  • Integrated watchdog timer for guaranteed safe operation
• MAX25432A devices provide integrated two-input to two-output USB Type-C CC1 and CC2 4Ω (typ) switches for external USB PD controller
• MAX25432B devices provide a single-port TCPC-compliant USB PD PHY for an external TCPM
  • Designed to comply with USB PD, Type-C, and TCPC specifications as a source and DFP
    • USB Type-C Specification, Revision 1.3
    • USB Power Delivery Specification, Revision 2.0, and Revision 3.0 Version 1.2
    • USB Type-C Port Controller Interface Specification, Revision 2.0 Version 1.1
  • Implements Type-C CC interface and USB PD PHY functions to a TCPM that handles PD policy management
    • Type-C cable plug orientation detection
    • Type-C detection supporting default, 1.5A or 3.0A current capabilities
• SAR ADC for V_BUS (10-bit) and I_BUS (7-bit) monitoring
  • Programmable V_BUS voltage alarm thresholds
• Integrated 1.5W, 400mΩ (typ) V_CONN switch with overcurrent protection removes need for dedicated V_CONN DC-DC and allows use of the common-voltage rail in the application
  • 3.0V to 5.5V input voltage support
  • Programmable I_LIM in 50mA steps
  • Diagnostic current prevents enabling into an STG condition
  • Fast V_CONN input undervoltage protection
  • Intelligent soft-start and auto-retry for noncompliant V_CONN loads
  • Integrated V_CONN discharge on HVCC1 and HVCC2 pins
  • I²C control saves two GPIOs on the USB PD controller
• Integrated module input fuse protection
  • Programmable V_IN undervoltage protection threshold
  • Fast detection of a fuse blow condition
  • Quick alert reporting to I²C master for resolution and possible USB PD renegotiation
• Integrated protection for passenger cable shield-short-to-battery faults prevents cable, passenger device, and car module damage
  • Fast and intelligent detection of cable shield overcurrent
  • Fast turn-off of external protection switch
  • Safe dissipation of inrush energy
  • Fault reporting and auto-retry for fault removal
• Integrated automotive protection on V_BUS output
  • Fixed 6.4A V_BUS circuit-breaker limit (V_BUS OCP)
  • Automatic short-to-GND fault detection and diagnostic
• Optionally supports USB BC1.2 CDP, DCP, and high-speed pass-through modes (SDP)
  • USB D+/D- protection and host charger emulator
  • Integrated HVDP/HVDM Apple and Samsung termination resistors
  • Compatible with USB OTG specification and Apple CarPlay
  • Supports Chinese Telecommunication Industry Standard YD/T 1591-2009
  • Integrated 1GHz, 3dB BW data switches supporting USB 2.0 480Mbps/12Mbps/1.5Mbps communication
  • Provides clean routing of Type-C Dp1, Dn1, Dp2, Dn2 connections to USB 2.0 downstream connector
  • Auto-DCP mode compatible with Oppo® and OnePlus® devices
• Integrated robust high-voltage protection for the USB PD or TCPM controller from events at the receptacle or captive cable
  • 24V (max) overvoltage protection on HVCC1/HVCC2
  • 24V (max) USB 2.0 overvoltage protection on HVDP/HVDM
  • Automatic fault detection and retry
  • Fault indication through active-low, open-drain ALERT output (maskable)
  • Short-to-battery and short-to-V_BUS protection
• Automotive-grade ESD protection on USB HVDP, HVDM, HVCC1, HVCC2, and SHLD_SNS pins
  • ±15kV Air-Gap/±8kV Contact Discharge IEC 61000-4-2
  • ±15kV Air-Gap/±8kV Contact Discharge ISO 10605

Whenever "MAX25432" is mentioned in this document, the corresponding description, figure, or diagram applies to all MAX25432 devices.

Whenever "MAX25432A" is mentioned in this document, the corresponding description, figure, or diagram only applies to MAX25432A devices.

Whenever “MAX25432B” is mentioned in this document, the corresponding description, figure, or diagram only applies to MAX25432B devices.

Whenever “G-suffix” is mentioned in this document, the corresponding description, figure, or diagram only applies to MAX25432 devices with the G-suffix. Example: MAX25432BATLG/V+ or MAX25432AATLG/V+ are G-suffix devices.

Whenever “M-suffix” is mentioned in this document, the corresponding description, figure or diagram only applies to MAX25432 devices with the M-suffix. Example: MAX25432BATLM/V+ is a M-suffix device.

Table 2 shows the reference specifications, their locations, and the common names they are referred to in this document.

IN is the input supply for the MAX25432 and the external H-bridge buck-boost converter. The MAX25432 can operate with a V_IN voltage in the range of 4.5V to 36V and is load-dump tolerant up to 40V. A 1μF ceramic capacitor with appropriate voltage rating should be connected for decoupling from IN to GND. An additional 100nF closer to the IN pin is recommended for improved high-frequency decoupling for internal circuitry.

To prevent large input current from tripping an upstream automotive fuse during high output power at low input voltage, the MAX25432 integrates a programmable input undervoltage lockout. When the input voltage is below the undervoltage lockout threshold, the buck-boost controller is turned off, which prevents high current being drawn at the input. The undervoltage lockout is set by the IN_UV_THRESH[3:0] register. This voltage can be programmed in the range of 4.5V to 8.5V in steps of 0.4V. The default setting for the undervoltage lockout threshold is 4.5V and can be changed on the fly after power-up through I²C. The UVLO threshold includes a blanking time of 150µs (typ), which prevents the device from turning off during input voltage transients.

The device includes an internal 5V linear regulator (BIAS) that provides power to the internal circuit blocks. The IC powers up once the voltage on BIAS crosses the undervoltage-lockout (UVLO) rising threshold and shuts down when BIAS falls below the UVLO falling threshold. Connect a 4.7μF ceramic capacitor from BIAS to GND for proper operation of the linear regulator. See the PCB Layout Guidelines for more information.

External loads, such as an MCU or PD controller, can be connected to BIAS as a power supply as long as:

• The total BIAS current, including internal circuitry, is below 80mA. Make sure to account for the internal buck-boost drivers current consumption when the H-bridge is switching. The usable current for external loads varies depending on operating conditions.
• The power dissipated by the internal BIAS LDO does not cause the MAX25432 to exceed the maximum continuous power dissipation or junction temperature as specified in the Absolute Maximum Ratings section.

With the proper current budgeting, BIAS can also be used to provide V_CONN power. To do so, tie BIAS to the V_CONN pin and program the V_CONN OCP low threshold to the 50mA setting. Cables and accessories needing 100mW V_CONN can be powered with this method. A 1μF ceramic capacitor close to the V_CONN pin with a low impedance to ground is required to minimize voltage dips on BIAS.

The MAX25432 integrates a 3.3V low-dropout linear regulator. The V_{DD_USB} output is used as a clamping voltage during high-voltage events such as short-to-battery or ESD strikes on HVDP/HVDM pins. The V_{DD_USB} output is also used to power the internal 10-bit ADC on MAX25432 devices. This regulator uses the 5V BIAS regulator as its input. Connect a 1μF ceramic capacitor from V_{DD_USB} to GND for proper operation of the linear regulator. See the PCB Layout Guidelines for more information.

The MAX25432 includes an output undervoltage comparator that sets the read-only VDD_USB_UV status bit when the regulator output goes below V_{DD_USB_UV} = 2.7V (typ). An output overvoltage comparator is also included, which sets the read-only VDD_USB_OV status bit when the regulator output goes above V_{DD_USB_OV} = 4.0V (typ).

The V_{DD_USB} 3.3V LDO cannot be used to power external loads.

The V_{DD_IO} pin must be connected to the external 1.8V, 3.3V, or 5.0V V_DD rail used for I²C communication by the I²C master (MCU, HUB, or PD controller). V_{DD_IO} is used as the pullup voltage for the SCL, SDA, and ALERT pins.

I²C communication can begin as soon as the power-up sequence is done (i.e., ALERT asserts low after HVEN goes high with V_IN > U_VLO) and the V_{DD_IO} input is within a valid voltage.

In an application where neither 1.8V, 3.3V, nor 5.0V external supplies are available, the V_{DD_IO} pin can be tied to V_{DD_USB} or BIAS directly. It is recommended to place a 10nF ceramic capacitor from the V_{DD_IO} pin to GND to provide local decoupling. The V_{DD_IO} input voltage can withstand a maximum voltage of 6V.

The MAX25432 integrates a buck-boost controller and drivers that provide power from the car battery to V_BUS. The buck-boost controller operates for input voltage ranges from 4.5V to 36V and is 40V load-dump tolerant. The buck-boost controller can regulate output voltages from 3.3V up to 21.0V and can limit output current from 1.0A up to 6.35A.

The integrated buck-boost ​controller operates in either a buck or boost, depending on the input and output voltages. The buck-boost transitions seamlessly between these modes to maintain a constant output voltage. This seamless four-switch buck-boost transition method ensures that V_BUS does not droop during V_IN transients and helps achieve excellent efficiency, load regulation, and line regulation. The architecture consists of a peak current-mode control loop that senses the inductor current using an external current-sense resistor on the input side (R_CS1). The slope compensation value can be adjusted in steps of 100mV by the SLP[2:0] register from 100mV to 800mV so as to prevent subharmonic oscillations. The switching frequency is also set by writing to the FSW[1:0] register. Four switching frequency options (220kHz, 300kHz, 400kHz, and 2.2MHz) are available in the device. To alleviate EMI problems the IC integrates a programmable spread spectrum on the switching frequency oscillator. The SS_SEL[1:0] register is used to set the desired amount of spread spectrum, which can be programmed to be ±3%, ±6%, and ±9% of the set switching frequency. The output voltage is fed back to the controller using an internal resistor divider on the OUT pin. The buck-boost control-loop is compensated externally using an RC network on the V_COMP pin. An output current-sense resistor (R_CS2) between CSP2 and OUT provides protection from runaway currents (V_OC2), and excessive negative currents (V_OC3). A third current-sense resistor (R_CS3) is required between OUT and CSN2 for V_BUS I_LIM DC regulation used in PPS Current-Limit (CL) mode. R_CS3 is also used for USB cable/voltage drop compensation in order to maintain a constant V_BUS voltage at the user port across output current variations.

Before enabling V_BUS, ensure that the I²C master performs the following initial configuration after power-up:

1. The V_BUS current limit has been set accordingly. See the V_BUS Current-Limit (CL) Regulation section.
2. The cable-compensation gain has been selected to offset any PCB trace/connector and/or cable drop. See the Cable Compensation section.
3. The slope-compensation peak ramp voltage is correctly set per the system requirements. See the Slope Compensation section.
4. The switching frequency and desired spread-spectrum settings are correctly set per the system requirements. See the Switching Frequency and Spread Spectrum section.
5. The SYNC pin direction is selected. By default, the SYNC pin acts as an input. See the Synchronization Input/Output (SYNC) section.
6. The V_BUS undervoltage and overvoltage thresholds and masks are correctly configured for the application. By default, the 12.5% UV/OV thresholds are selected. See the VBUS_THRESH register description.
7. No fault has been reported by the MAX25432 through the SHIELDING bit or dedicated V_BUS Fault flags. See the Fault Table (Analog Devices Auto-Shield).
8. V_BUS needs to be at vSafe0V before being enabled. Make sure the VSAFE0V bit in the EXTENDED_STATUS[7:0] register reads logic '1'.
9. If a V_BUS pre-bias condition exists, the I²C master needs to attempt a force discharge first using MAX25432 integrated force discharge functionality. The MAX25432 issues an I²C error if V_BUS is not at vSafe0V prior to being enabled. See the V_BUS Discharge and Fault Table (Analog Devices Auto-Shield) sections.

To comply with the USB-IF TCPCI specification, the MAX25432 only sources V_BUS when the proper command is received from the I²C master. In order to enable V_BUS:

1. Write 0x77 (SourceVbusDefaultVoltage) to the COMMAND[7:0] register. The MAX25432 then soft-starts to vSafe5V (5.15V, typ).

To set V_BUS to non-default voltages (voltages other than vSafe5V), perform the following steps. Note that once V_BUS is at vSafe5V, only then can the I²C master request for non-5V outputs.

2. Select the desired non-default output voltage by writing to the NONDEFAULT_TARGET registers.
3. Write 0x88 (SourceVbusNonDefault) to the COMMAND[7:0] register. The MAX25432 then transitions to the non-default voltage with a USB PD compliant slew rate.

To change to a different non-default output voltage target, repeat steps 2 and 3. To go back to vSafe5V, perform step 1. Note that the output current limit can be changed while sourcing V_BUS.

To disable V_BUS, write 0x66 (DisableSourceVbus) to the COMMAND[7:0] register. The MAX25432 will then turn off the buck-boost. To discharge V_BUS to vSafe0V, see the V_BUS Discharge section.

For more information on specific actions to be performed with the MAX25432 to comply with USB Type-C and USB power delivery, contact Analog Devices.

The MAX25432 provides a programmable switching frequency and spread spectrum through I²C. The internal oscillator frequency is set by the FSW[1:0] register. The switching frequency can be programmed to 220kHz, 300kHz, 400kHz, or 2.2MHz.

Spread spectrum can be enabled and adjusted by writing to the SS_SEL[1:0] register. Spread spectrum can be programmed to ±3%, ±6%, and ±9% centered on f_SW. The default oscillator frequency at power-up is 400kHz with no spread spectrum.

Table 3 shows the typical variation of the switching frequency for each spread-spectrum setting.

The MAX25432 integrates a clock synchronization input/output to be used in two-port applications or with other power supplies in the module. The benefits of the synchronization between two switching power supplies are as follows:

• Reduced input capacitance requirement due to 180° out-of-phase current demands, which leaves time for the input capacitors to recharge between each cycle.
• Reduced EMI due to less input current ripple. This translates to a smaller inductor required for the module input EMI filter.

Both the reduced input capacitance requirement and reduced input current ripple help reduce system cost significantly.

The SYNC pin direction can be configured through I²C as either an input or an output through the SYNC_DIR register. SYNC_DIR is a one-bit register which is set by default to logic '1'. In this case, the SYNC pin on the MAX25432 is expecting an external input signal to synchronize its oscillator to the input on the SYNC pin. If there is no input on this pin, the buck-boost operates with the internal oscillator. Connect SYNC to GND and configure it as an input if not used.

The SYNC_DIR bit can be set to logic '0' by the I²C master. In this case, the SYNC pin acts as an output and, when sourcing V_BUS, generates a fixed 50% duty cycle square waveform at the master's switching frequency that is phase shifted by 180°, as shown in Figure 2. Note that only buck operation is shown. The SYNC feature also supports boost and buck/boost operation.

The internal spread spectrum is disabled if SYNC is configured as an input and synchronized to an external clock.

When configured as an output, the SYNC signal includes the spread-spectrum modulation for the slave to synchronize to.

When configured as an input, the external clock signal must be within f_{SYNC_RANGE} of the programmed switching frequency f_SW and have a duty cycle between 30% to 70% for the MAX25432 to synchronize properly. If not, the slave reverts to its internal clock synchronization autonomously without changing the SYNC_DIR bit.

The MAX25432 features a peak input current limit. The device limits the input current by reducing the output voltage if the sensed voltage drop across the input current-sense resistor (V_CSP1 - V_CSN1) is above the fixed V_OC1 threshold (50mV, typ). The current threshold can be selected with the input current-sense resistor value R_CS1. See the Current-Sense Resistors Selection section.

An input overcurrent event sets the latched, read-only IN_OC status bit to logic '1' after a debounce of 16ms.

The MAX25432 reports the event to the VNDR_ALRT bit in the ALERT_H register if the IN_OC_MASK is unmasked. Additionally, if MSK_VNDR_ALRT bit is unmasked, the ALERT pin is asserted low.

The MAX25432 features a programmable DC current-regulation loop on V_BUS to support PPS CL operation.

The buck-boost is allowed to enter the CL mode only when the CL_EN bit is set to 1, as seen in Figure 3.

When CL_EN = 1 and the V_BUS DC output current monitored on R_CS3 is less than the programmed current-limit threshold set in the VBUS_ILIM_SET[7:0] register, the buck-boost stays in Constant-Voltage (CV) mode and V_BUS is regulated to the programmed voltage target (default or non-default V_BUS).

When the V_BUS DC output current is above the current-limit threshold, the ICOMP voltage increases and drives the internal feedback node higher to reduce V_BUS and maintain constant current. As the PD device increases its load, V_BUS reduces further and the MAX25432 maintains accurate regulation until the PD device reduces its load or the sensed OUT voltage reaches the V_BUS STG threshold (2.85V, typ), which will turn off the buck-boost. See the Fault Table (Analog Devices Auto-Shield) for more information on the V_BUS STG fault.

The buck-boost regulation mode is indicated by the OMF_TRANS and the CL_CV bits in the VENDOR_STATUS and AUTO_SHIELD_STATUS_1 registers, respectively. See the register descriptions in the Register Map for more details.

When CL_EN = 0, the MAX25432 is prevented from entering CL mode. The MAX25432 does not regulate the output current in this mode and maintains CV regulation for the debounce duration. If the current exceeds the programmed threshold in the VBUS_ILIM_SET[7:0] register for more than 16ms (typ), the MAX25432 turns off the buck-boost controller to protect itself and the sink. This setting is recommended when sourcing vSafe5V or fixed PDOs, and also to meet the MFi Overcurrent specification (introduced in the R30 revision in 2018).

Additionally, a fixed overcurrent protection (V_BUS OCP), independent of CL_EN setting, is always active when sourcing V_BUS. The fault is triggered when V_BUS current exceeds 6.4A DC (typ) which immediately causes the buck-boost controller to turn off.

See the Fault Table (Analog Devices Auto-Shield) for more information on action, reporting, and recovery upon a V_BUS current-limit or OCP condition.

USB charging current of devices could be as high as 5A while connectors and cables contribute to voltage drops. Stringent USB port supply voltage specifications increase the need for compensation, and excessive voltage drop causes device disconnects. The voltage drop compensation is implemented by measuring the current and feeding back the current information to the internal feedback block of the converter. In this implementation, the load regulation of the power supply is effectively changed to compensate a voltage drop on a power line.

The MAX25432 ​compensates voltage drops for up to 516mΩ from parasitic resistance present from the OUT pin to the user cable, including but not limited to the USB captive cable, PCB trace, and inline connectors. The cable compensation is designed for use in the constant voltage region at up to 5A. Cable compensation stays active upon entry into current-limit region. The gain of the cable-compensation circuit can be adjusted through I²C by changing the values in GAIN[5:0] in the cable-compensation control register CABLE_COMP_CONTROL. The R_CS3 external current-sense resistor is required when using the cable-compensation feature. See the USB Cable Compensation section for guidelines.

Thermal shutdown protection limits the temperature the device is allowed to reach before forced shutdown. If the die temperature exceeds +165°C, the device shuts down and needs to cool down. Once the device has cooled down by 15°C, the device is automatically enabled again (as long as HVEN is still high and V_IN is above UVLO). The thermal overload protects the device in the event of overheating. For continuous operation, do not exceed the absolute maximum junction temperature of +150°C. For more information regarding actions and recovery steps taken upon a thermal shutdown fault, see the Fault Table (Analog Devices Auto-Shield) and Fault Types sections.