Pin Specifications

Pin Configuration MAX25222/MAX25222C
PIN NAME FUNCTION
Pin Description
1 VPROG Programming Voltage. Apply a voltage of 8.5V to this pin during the programming of non-volatile registers. Connect to GND through a resistor during normal operation.
2 LXN DC-DC Inverting Converter Inductor/Diode Connection.
3 INN Inverting Converter Input. Connect 10μF + 0.1μF ceramic capacitors from this pin to ground for proper operation.
4 VCB Drive Output for External npn Pass Transistor for VCOMN regulator. Connect to the base of the external npn transistor.
5 VCOM Output of VCOM amplifier.
6 VCOMN Negative Supply for VCOM Buffer. Connect a ceramic capacitor of at least 1μF from VCOMN to GND.
7 IN Supply Connection for Display Bias Circuitry. Bypass IN with local 10μF and 0.1μF capacitors.
8 EN Enable Input Pin. When EN is low, the device is in shutdown. When EN is taken high, the device is active. In stand-alone mode, the outputs are turned on in the stored sequence when EN goes high.
9 ADD Device Address Select pin. Connect to GND or V18 to Select the Device I2C Address. See the I2C address table. To use stand-alone mode (without I2C) leave the ADD pin open. In this mode, the device turns on all outputs in the programmed sequence when EN is taken high.
10 V18 Output of Internal 1.8V Regulator. Connect a 1μF capacitor from V18 to GND.
11 GND Ground Connection
12 BST Bootstrap Capacitor Connection for Synchronous Rectifier Driver. Connect a 0.1μF ceramic capacitor between BST and LXP.
13 PGND Ground Connection for Boost Switching Device and VCOM Buffer. Connect to GND using a low-impedance trace.
14 LXP Switching Node of Boost Converter. Connect the boost inductor between LXP and IN.
15 HVINP Boost Output and Input to Positive and Negative Charge-Pump Drivers. Bypass HVINP with a 10μF output capacitor placed close to the pin.
16 AVDD Switched Output of Boost Converter. Connect a bypass capacitor of value 2.2μF from AVDD to PGND.
17 PGVDD Supply Voltage for Positive Charge Pump. PGVDD is connected to HVINP by means of an internal switch when the positive charge pump is enabled. Bypass PGVDD with a ceramic capacitor of 1μF to GND.
18 FC2+ Positive Connection for Second Flying Capacitor. Connect a 22nF capacitor from FC2- to FC2+.
19 FC2- Negative Connection for Second Flying Capacitor. Connect a 22nF capacitor from FC2- to FC2+.
20 FC1+ Positive Connection for First Flying Capacitor. Connect a 22nF capacitor from FC1- to FC1+.
21 FC1- Negative Connection for First Flying Capacitor. Connect a 22nF capacitor from FC1- to FC1+.
22 VGON Output of Positive Charge-Pump Block. Connect a 1μF capacitor from VGON to GND.
23 CPGND Ground Connection for Charge Pumps.
24 VGOFF Output of Negative Charge-Pump Block. Connect a 1μF capacitor from this pin to GND.
25 DN Negative Charge-Pump Push-Pull Drive Output.
26 SDA Bidirectional I2C Data Pin.
27 SCL I2C Clock Pin.
28 FLTB Open-Drain, Active-Low Fault Output. Connect a pullup resistor from FLTB to a logic supply ≤5V. In stand-alone mode, the duty cycle of the FLTB pin indicates an error condition, if present (see Table 4). When the serial interface is used, FLTB is either a 0 (indicating data to be read from the internal registers) or a 1.
29 RREF Reference Resistor Pin. When using the temperature compensation function, connect a resistor from RREF to GND. If unused, leave RREF unconnected.
30 TEMP Temperature Sensor Pin. When using the temperature compensation function, connect an NTC from TEMP to GND. If unused, leave TEMP unconnected.
31 DGND Logic Ground.
32 NAVDD Negative Source-Driver Output Voltage. Connect ceramic capacitors of value 0.1μF and 10μF from this pin to GND with the smallest capacitor closest to the pin.