Package Information

TQFN

Package Code	T3255+6C
Outline Number	21-0140
Land Pattern Number	90-0603
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ_JA)	47°C/W
Junction to Case (θ_JC)	3°C/W
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ_JA)	36°C/W
Junction to Case (θ_JC)	3°C/W

TQFN-SW

Package Code	T3255Y+6C
Outline Number	21-100041
Land Pattern Number	90-100066
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ_JA)	47°C/W
Junction to Case (θ_JC)	3°C/W
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ_JA)	36°C/W
Junction to Case (θ_JC)	3°C/W

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

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Programming Voltage. Apply a voltage of 8.5V to this pin during the programming of non-volatile registers. Connect to GND through a resistor during normal operation.DC-DC Inverting Converter Inductor/Diode Connection.Inverting Converter Input. Connect 10μF + 0.1μF ceramic capacitors from this pin to ground for proper operation.Drive Output for External npn Pass Transistor for VCOMN regulator. Connect to the base of the external npn transistor.Output of VCOM amplifier.Negative Supply for VCOM Buffer. Connect a ceramic capacitor of at least 1μF from VCOMN to GND.Supply Connection for Display Bias Circuitry. Bypass IN with local 10μF and 0.1μF capacitors.Enable Input Pin. When EN is low, the device is in shutdown. When EN is taken high, the device is active. In stand-alone mode, the outputs are turned on in the stored sequence when EN goes high.Device Address Select pin. Connect to GND or V18 to Select the Device I2C Address. See the I2C address table. To use stand-alone mode (without I2C) leave the ADD pin open. In this mode, the device turns on all outputs in the programmed sequence when EN is taken high.Output of Internal 1.8V Regulator. Connect a 1μF capacitor from V18 to GND.Ground ConnectionBootstrap Capacitor Connection for Synchronous Rectifier Driver. Connect a 0.1μF ceramic capacitor between BST and LXP.Ground Connection for Boost Switching Device and VCOM Buffer. Connect to GND using a low-impedance trace.Switching Node of Boost Converter. Connect the boost inductor between LXP and IN.Boost Output and Input to Positive and Negative Charge-Pump Drivers. Bypass HVINP with a 10μF output capacitor placed close to the pin.Switched Output of Boost Converter. Connect a bypass capacitor of value 2.2μF from AVDD to PGND.Supply Voltage for Positive Charge Pump. PGVDD is connected to HVINP by means of an internal switch when the positive charge pump is enabled. Bypass PGVDD with a ceramic capacitor of 1μF to GND.Positive Connection for Second Flying Capacitor. Connect a 22nF capacitor from FC2- to FC2+.Negative Connection for Second Flying Capacitor. Connect a 22nF capacitor from FC2- to FC2+.Positive Connection for First Flying Capacitor. Connect a 22nF capacitor from FC1- to FC1+.Negative Connection for First Flying Capacitor. Connect a 22nF capacitor from FC1- to FC1+.Output of Positive Charge-Pump Block. Connect a 1μF capacitor from VGON to GND.Ground Connection for Charge Pumps.Output of Negative Charge-Pump Block. Connect a 1μF capacitor from this pin to GND.Negative Charge-Pump Push-Pull Drive Output.Bidirectional I2C Data Pin.I2C Clock Pin.Open-Drain, Active-Low Fault Output. Connect a pullup resistor from FLTB to a logic supply ≤5V. In stand-alone mode, the duty cycle of the FLTB pin indicates an error condition, if present (see Table 4). When the serial interface is used, FLTB is either a 0 (indicating data to be read from the internal registers) or a 1.Reference Resistor Pin. When using the temperature compensation function, connect a resistor from RREF to GND. If unused, leave RREF unconnected.Temperature Sensor Pin. When using the temperature compensation function, connect an NTC from TEMP to GND. If unused, leave TEMP unconnected.Logic Ground.Negative Source-Driver Output Voltage. Connect ceramic capacitors of value 0.1μF and 10μF from this pin to GND with the smallest capacitor closest to the pin.