|
PARAMETER
|
SYMBOL
|
CONDITIONS
|
MIN
|
TYP
|
MAX
|
UNITS
|
Electrical Characteristics
(VIN = 3.3V, VINN = 3.3V, Limits are 100% guaranteed between TA = -40°C and TA = +125°C.)
|
INPUT SUPPLY
|
|
IN Voltage Range
|
|
|
2.65
|
|
5.5
|
V
|
|
IN UVLO Threshold
|
IN_UVLO_R
|
Rising
|
2.4
|
2.5
|
2.57
|
V
|
|
IN UVLO Hysteresis
|
IN_UVLO_HYS
|
|
|
100
|
|
mV
|
|
IN Shutdown Current
|
IIN_SHDN
|
EN = GND, VIN = 3.3V, TA = +25°C
|
|
7
|
12
|
µA
|
|
IN Quiescent Current
|
IIN_Q
|
VEN = VIN = 3.3V, no switching. |
|
1.5
|
2.5
|
mA
|
|
V18 REGULATOR
|
|
V18 Output Voltage
|
|
|
1.72
|
1.8
|
1.88
|
V
|
|
V18 Current Limit
|
|
|
60
|
|
|
mA
|
|
V18 Undervoltage Lockout
|
|
V18 rising
|
1.6
|
1.65
|
1.7
|
V
|
|
V18 Undervoltage Hysteresis
|
|
|
|
150
|
|
mV
|
|
V18OOR Diagnostic Levels
|
|
|
-8
|
|
+8
|
%
|
|
OSCILLATOR
|
|
Operating Frequency
|
fBOOSTH
|
fSW bit = 0, dither disabled. Switching frequency for boost, inverter, and charge pumps. |
1950
|
2100
|
2250
|
kHz
|
|
fBOOSTL
|
fSW bit = 1, dither disabled. Switching frequency for boost, inverter, and charge pumps. |
385
|
420
|
455
|
|
Frequency Dither
|
fBOOSTD
|
|
|
±6
|
|
%
|
|
BOOST REGULATOR
|
|
HVINP Output Voltage Range
|
VHVINP
|
|
VIN + 1
|
|
10.5
|
V
|
|
AVDD Output Voltage Range
|
|
|
4.2
|
|
10.5
|
V
|
|
AVDD Adjustment Step Size
|
|
|
|
0.1
|
|
V
|
|
AVDD Output Regulation
|
VAVDD
|
avdd[5:0] = 0x1A, full load current and input voltage range
|
6.664
|
6.8
|
6.936
|
V
|
|
Oscillator Maximum Duty Cycle
|
|
420kHz switching frequency
|
87
|
88.5
|
90
|
%
|
|
2.1MHz switching frequency
|
84
|
87
|
90
|
|
Low-Side Switch On-Resistance
|
LXP_RON_LS
|
ILXP = 0.1A
|
|
0.1
|
0.2
|
Ω
|
|
Synchronous Rectifier On-Resistance
|
|
|
|
0.1
|
0.2
|
Ω
|
|
Synchronous Rectifier Zero-Crossing Threshold
|
ZX_TH
|
|
|
70
|
|
mA
|
|
LXP Leakage Current
|
LXP_L_LEAK
|
VEN = 0V, VLXP = 10.5V
|
|
|
20
|
µA
|
|
LXP Current Limit
|
ILIMPH
|
Duty cycle = 50%
|
1.7
|
2
|
2.3
|
A
|
|
Soft-Start Period
|
tBOOST_SS
|
Current-limit ramp
|
|
5
|
|
ms
|
|
INVERTING REGULATOR
|
|
Oscillator Maximum Duty Cycle
|
|
2.1MHz switching frequency
|
92
|
95
|
|
%
|
|
INV_MAXDC
|
420kHz switching frequency
|
88
|
90
|
|
|
VAVDD + VNAVDD Regulation Voltage
|
VNAVDD_AVDD_REG
|
VINN = 2.65V to 5.5V, VAVDD = 6.8V, 1mA < INAVDD < 200mA, IAVDD = same load as NAVDD
|
-34
|
0
|
34
|
mV
|
|
LXN On-Resistance
|
LXN_RON
|
INN to LXN, ILXN = 0.1A
|
|
0.25
|
0.5
|
Ω
|
|
LXN Leakage Current
|
LXN_LEAK
|
VIN = 3.6V, VLXN = VNAVDD = -6.8V, TA = +25°C
|
|
|
20
|
µA
|
|
LXN Current Limit
|
ILIMNH
|
Duty cycle = 80%
|
1.55
|
1.9
|
2.25
|
A
|
|
Soft-Start Period
|
tINV_SS
|
Current-limit ramp
|
|
5
|
|
ms
|
|
NAVDD Discharge Resistance
|
|
|
|
2
|
|
kΩ
|
|
POSITIVE CHARGE-PUMP REGULATOR
|
|
VGON Threshold for Charge-Pump Switching Enable
|
|
|
|
VHVINP-0.8
|
|
V
|
|
FC1-, FC2- Switches Current Limit, High-Side
|
|
|
90
|
120
|
|
mA
|
|
FC1-, FC2- Switches Current Limit, Low-Side
|
|
|
72
|
100
|
|
mA
|
|
FC1-, FC2- to CPGND On-Resistance
|
|
|
|
4
|
6.5
|
Ω
|
|
FC1-, FC2- to HVINP On-Resistance
|
|
|
|
6
|
10.5
|
Ω
|
|
FC2+ to PGVDD, FC1+ to FC2+ and VGON to FC1+ Switches On-Resistance
|
|
|
|
2.5
|
4.5
|
Ω
|
|
VGON Voltage Range, I2C Mode
|
|
|
7.6
|
|
20.2
|
V
|
|
VGON Adjustment Step Size, I2C Mode
|
|
|
|
0.2
|
|
V
|
|
VGON Output Voltage
|
VVGON
|
vgon[5:0] = 0x16, full load current and VHVINP > 5V, charge-pump tripler
|
11.7
|
12
|
12.3
|
V
|
|
VGON Discharge Resistance
|
|
|
2.2
|
3
|
3.8
|
kΩ
|
|
NEGATIVE CHARGE-PUMP REGULATOR
|
|
DN Current Limit
|
|
|
75
|
100
|
|
mA
|
|
VGOFF Voltage Range, I2C Mode
|
|
|
-18.2
|
|
-5.6
|
V
|
|
VGOFF Adjustment Step Size, I2C Mode
|
|
|
|
0.2
|
|
V
|
|
VGOFF Output-Voltage Accuracy
|
|
vgoff[5:0] = 0x16, full load current and input voltage range, 420kHz operation. |
-10.3
|
-10
|
-9.7
|
V
|
|
DN On-Resistance, High-Side
|
|
|
|
6
|
10
|
Ω
|
|
DN On-Resistance, Low-Side
|
|
IDN = -10mA
|
|
3.5
|
6.5
|
Ω
|
|
VGOFF Discharge Current
|
|
|
|
1.5
|
|
mA
|
|
SEQUENCE SWITCHES
|
|
AVDD ON Resistance
|
RONAVDD
|
Between HVINP and AVDD, IAVDD = 200mA
|
|
0.5
|
1
|
Ω
|
|
AVDD Current Limit
|
ILIMPOS
|
|
300
|
|
600
|
mA
|
|
AVDD Discharge Resistance
|
|
|
|
1.2
|
|
kΩ
|
|
PGVDD On-Resistance
|
|
(HVINP-PGVDD), IPGVDD = 3mA
|
|
6
|
9
|
Ω
|
|
PGVDD Current Limit
|
|
Expires when PGVDD charging is completed
|
80
|
100
|
|
mA
|
|
FAULT PROTECTION
|
|
Fault Timeout
|
|
tfault[1:0] = 10
|
|
60
|
|
ms
|
|
Fault Retry Time
|
|
tretry[1:0] = 10 or 11
|
|
1.9
|
|
s
|
|
FLTB Output Frequency
|
|
Stand-alone mode only
|
0.88
|
1
|
1.12
|
kHz
|
|
FLTB Output Duty Cycle, VGON or VGOFF Fault
|
|
Stand-alone mode only
|
|
75
|
|
%
|
|
FLTB Output Duty Cycle with AVDD, NAVDD, or HVINP Fault
|
|
Stand-alone mode only
|
|
50
|
|
%
|
|
FLTB Output Duty Cycle, VCOM Fault
|
|
Stand-alone mode only
|
|
25
|
|
%
|
|
AVDD Undervoltage Fault Threshold
|
|
Relative measurement between HVINP and AVDD
|
80
|
85
|
90
|
%
|
|
HVINP Overvoltage Fault Threshold
|
|
Of set value
|
110
|
115
|
120
|
%
|
|
AVDD Short-Circuit Fault Threshold
|
|
Relative measurement between HVINP and AVDD
|
35
|
40
|
45
|
%
|
|
NAVDD Undervoltage Fault Threshold
|
|
Measured with respect to AVDD
|
80
|
85
|
90
|
%
|
|
NAVDD Overvoltage Fault Threshold
|
|
|
110
|
115
|
120
|
%
|
|
NAVDD Short-Circuit Fault Threshold
|
|
Measured with respect to AVDD
|
35
|
40
|
45
|
%
|
|
VGON Undervoltage Fault Threshold
|
|
Of set value
|
80
|
85
|
90
|
%
|
|
VGON Overvoltage Fault Threshold
|
|
Of set value
|
110
|
115
|
120
|
%
|
|
VGON Short-Circuit Fault Threshold
|
|
VGON Falling, MAX25222ATJ only
|
|
VHVINP-1.1
|
|
V
|
|
VGOFF Undervoltage Fault Threshold
|
|
Of set value
|
80
|
85
|
90
|
%
|
|
VGOFF Overvoltage Fault Threshold
|
|
Of set value
|
110
|
115
|
120
|
%
|
|
VGOFF Short-Circuit Fault Threshold
|
|
MAX25222ATJ only
|
35
|
40
|
45
|
%
|
|
Short-Circuit and Overload Fault Delay
|
|
|
|
10
|
|
µs
|
|
Bandgap Out-Of-Range Diagnostic Threshold
|
|
|
|
+11
|
|
%
|
|
VCOM BUFFER
|
|
VCOMN Output Voltage
|
|
IVCOM = 120mA, VNAVDD = -10.5V
|
|
-3.5
|
-3.2
|
V
|
|
VCB Output Current
|
|
|
5
|
12
|
21
|
mA
|
|
VCOM Output Current Limit, Sinking
|
|
Dynamic output current, t < tFAULT
|
120
|
200
|
300
|
mA
|
|
VCOM Output Current Limit, Sourcing
|
ILIMCOMP
|
Dynamic output current, t < tFAULT
|
120
|
200
|
300
|
mA
|
|
VCOM Overcurrent Detection Threshold
|
|
|
60
|
70
|
85
|
% of ILIMCOMP
|
|
VCOM Offset Voltage, Complete Range
|
|
VVCOM = -2.49V and VVCOM = +1V, no load
|
-25
|
|
+25
|
mV
|
|
VCOM Offset Voltage, 25°C
|
|
TA = +25°C, VCOM = -0.5V
|
-6
|
|
+6
|
mV
|
|
VCOM Offset Voltage
|
|
VCOM = -0.5V
|
-10
|
|
+10
|
mV
|
|
VCOM Output Voltage Range
|
|
Temperature compensation disabled
|
-2.49
|
|
1
|
V
|
|
VCOM DAC Step Size
|
|
|
|
6.83
|
|
mV
|
|
VCOM Buffer Slew Rate
|
|
CVCOM = 10nF, VCOM from -2.49V to +1V
|
|
0.72
|
|
V/μs
|
|
VCOM Fault Threshold
|
|
Deviation from set voltage
|
|
+0.25
|
|
V
|
|
VCOM Fault Detection Filter Time
|
|
tfault[1:0] = 10
|
|
60
|
|
ms
|
|
VCOM Discharge Resistance
|
|
to GND
|
9
|
14
|
22
|
kΩ
|
|
RREF INPUT
|
|
RREF Input Voltage Range
|
|
|
0
|
|
1.25
|
V
|
|
RREF ADC Resolution
|
|
|
|
4.88
|
|
mV
|
|
RREF Conversion Rate
|
|
|
|
128
|
|
kHz
|
|
TEMP Voltage
|
VTEMP
|
ITEMP = 10μA to 500μA
|
|
625
|
|
mV
|
|
TEMP Current Mirror Gain
|
|
ITEMP = 10μA to 500μA
|
|
1
|
|
μA/μA
|
|
Internal Temperature Sensor Voltage
|
|
TA = +25°C
|
|
620
|
|
mV
|
|
RREF DAC Offset
|
|
|
|
5
|
|
mV
|
|
RREF DAC Full-Scale Error
|
|
|
|
5
|
|
mV
|
|
RREF DAC Gain Error
|
|
|
-0.4
|
|
+0.4
|
%
|
|
RREF DAC Differential Non-linearity
|
|
|
|
0.5
|
|
LSB
|
|
RREF DAC Integral Non-Linearity
|
|
|
|
0.5
|
|
LSB
|
|
LOGIC INPUTS and OUTPUTS (EN, SCL, ADD, SDA)
|
|
EN Glitch Filter
|
EN_BLK
|
|
|
10
|
|
µs
|
|
EN Minimum Low Time For Reset
|
|
CV18 = 1μF
|
1
|
|
|
ms
|
|
EN Input Logic-High
|
|
|
1.22
|
|
|
V
|
|
EN Input Logic-Low
|
|
|
|
|
0.6
|
V
|
|
ADD Input Logic-High
|
|
|
1.22
|
|
|
V
|
|
ADD Input Logic-Low
|
|
|
|
|
0.66
|
V
|
|
ADD Input Pulldown Current
|
|
|
|
10
|
12
|
μA
|
|
SCL, SDA Input, Logic-High
|
|
|
1.22
|
|
|
V
|
|
SCL, SDA Input, Logic-Low
|
|
|
|
|
0.6
|
V
|
|
SCL Input Leakage Current
|
|
|
-1
|
|
+1
|
µA
|
|
FLTB, SDA Output Low Voltage
|
VOL
|
Sinking 5mA
|
|
|
0.4
|
V
|
|
FLTB, SDA Output Leakage Current
|
ILEAK
|
5.5V
|
-1
|
|
+1
|
µA
|
|
PROGRAMMING VOLTAGE
|
|
VPROG Voltage
|
|
|
8.2
|
8.5
|
8.8
|
V
|
|
VPROG Voltage Undervoltage Threshold
|
|
VPROG rising
|
|
8
|
8.2
|
V
|
|
VPROG Voltage Overvoltage Threshold
|
|
VPROG falling
|
8.8
|
9
|
|
V
|
|
VPROG Input Current
|
|
During NV programming, TA = +25°C
|
|
9
|
25
|
mA
|
|
NV Programming Time
|
|
|
|
16
|
20
|
ms
|
|
THERMAL SHUTDOWN
|
|
Thermal Warning Threshold
|
|
|
|
125
|
|
°C
|
|
Thermal-Shutdown Threshold
|
TSHDN
|
|
|
160
|
|
°C
|
|
Thermal-Shutdown Hysteresis
|
TSHDN_HYS
|
|
|
15
|
|
°C
|
|
I2C INTERFACE
|
|
Clock Frequency
|
fSCL
|
|
|
|
0.4
|
MHz
|
|
Hold Time (Repeated) START
|
tHD:STA
|
|
600
|
|
|
ns
|
|
SCL Low Time
|
tLOW
|
|
1300
|
|
|
ns
|
|
SCL High Time
|
tHIGH
|
|
600
|
|
|
ns
|
|
Setup Time (Repeated) START
|
tSU:STA
|
|
600
|
|
|
ns
|
|
Data Hold Time
|
tHD:DAT
|
|
0
|
|
|
ns
|
|
Data Setup Time
|
tSU:DAT
|
|
100
|
|
|
ns
|
|
Setup Time for STOP Condition
|
tSU:STO
|
|
600
|
|
|
ns
|
|
Spike Suppression
|
|
|
|
50
|
|
ns
|