Detailed Description

Detailed Description
The MAX22506E ESD-protected RS-485/RS-422 transceiver is optimized for high-speed communications up to 50Mbps. This transceiver features integrated hot-swap functionality to eliminate false transitions on the driver during power-up or during a hot-plug event. This transceiver also feature fail-safe receiver inputs, guaranteeing a logic-high on the receiver output when inputs are shorted or open for longer than 10µs (typ).
Receiver Threshold Voltages
The device receiver features a large threshold hysteresis of 250mV (typ) for increased differential noise rejection. Additionally, the receiver features symmetrical threshold voltages. Symmetric thresholds have the advantage that recovered data at the RO output does not have duty-cycle distortion. Typically, fail-safe receivers, which have unipolar (non-symmetric) thresholds, show some duty-cycle distortion at high signal attenuation due to long cable lengths.
Fail-Safe Functionality
The MAX22506E features fail-safe receiver inputs, guaranteeing a logic-high on the receiver output (RO) when the receiver inputs are shorted or open for longer than 10μs (typ). When the differential receiver input voltage is between ±50mV, or -50mV ≤ (VA - VB) ≤ +50mV, for more than 10μs (typ), RO is logic-high. For example, in the case of a terminated bus with all transmitters disabled, the receiver differential input voltage is pulled to 0V by the termination resistor, so -50mV ≤ (VA - VB) = 0V ≤ +50mV and RO is guaranteed to be a logic high after 10μs (typ).
Driver Single-Ended Operation
The driver outputs of the MAX22506E can be used in the standard differential operating mode or as single-ended outputs. Because the driver outputs swing rail-to-rail, they can also be used as individual standard TTL or CMOS logic outputs.
Hot-Swap Inputs
Inserting circuit boards into a hot or powered backplane can cause voltage transients on DE, RE, and receiver inputs A and B that can lead to data errors. For example, upon initial circuit board insertion, the processor undergoes a power-up sequence. During this period, the high impedance state of the output drivers makes them unable to drive the MAX22506E enable inputs to a defined logic level. Meanwhile, leakage currents of up to 10μA from the high-impedance output or capacitively coupled noise from VCC or GND could cause an input to drift to an incorrect logic state. To prevent such a condition from occurring, the MAX22506E features hot-swap input circuitry on DE and RE to safeguard against unwanted driver activation during hot-swap situations. When VCC rises, an internal pulldown circuit holds DE low and RE high for at least 10μs. After the initial power-up sequence, the internal pulldown/pullup circuitry becomes transparent, resetting the hot-swap tolerable inputs.
Driver Output Protection
Two mechanisms prevent excessive output current and power dissipation caused by faults or by bus contention. The first, a current limit on the output stage, provides immediate protection against short-circuits over the whole common-mode voltage range. The second, a thermal-shutdown circuit, forces the driver outputs into a high-impedance state if the die temperature exceeds +160°C (typ).
Low-Power Shutdown Mode

The MAX22506E features a low-power shutdown mode to reduce supply current when the transceiver is not needed. Pull the RE input high and the DE input low to put the device in low-power shutdown mode. If the inputs are in this state for at least 800ns, the parts are guaranteed to enter shutdown. The MAX22506E draws 5μA (max) of supply current when the device is in shutdown.

The RE and DE inputs can be driven simultaneously. The MAX22506E is guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns.

Integrated ESD Protection

ESD protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs of the MAX22506E have extra protection against static electricity. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, the MAX22506E is able to keep working without latch-up or damage.

ESD protection can be tested in various ways. The transmitter outputs and receiver inputs of the MAX22506E are characterized for protection to the following limits:

  • ±15kV HBM
  • ±7kV using the Air-Gap Discharge method specified in IEC 61000-4-2
  • ±6kV using the Contact Discharge method specified in IEC 61000-4-2
Human Body Model (HBM)

Figure 9 shows the HBM test model, and Figure 10 shows the current waveform it generates when discharged into a low-impedance state. This models consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into a test device through a 1.5kΩ resistor.

Figure 9. Human Body ESD Test Model
Figure 10. Human Body Current Waveform
IEC 61000-4-2

The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. However, it does not specifically refer to integrated circuits. The integrated ESD protection circuitry in the transceiver helps in designing equipment to meet IEC 61000-4-2.

The major difference between tests done using the HBM and IEC 61000-4-2 models is the higher peak current in IEC 61000-4-2. This is due to the lower series resistance in the IEC 61000-4-2 model and typically results in the withstand voltage measured to IEC 61000-4-2 being generally lower than that measured using the HBM.

Figure 11 shows the IEC 61000-4-2 model and Figure 12 shows the current waveform for the IEC 61000-4-2 ESD Contact Discharge test.

Figure 11. IEC 61000-4-2 ESD Test Model
Figure 12. IEC 61000-4-2 ESD Generator Current Waveform