Application Circuits
Typical Application Circuits
Typical Application Diagram
Analog Input 3. In analog output voltage mode, the input to the voltage sense feedback amplifier. In all other modes, a high-voltage sense to the ADC.
AI3
AI3
Analog Input 5. Along with AI6, a positive voltage input of a differential pair to the ADC.
AI5
AI5
Analog Input 6. Along with AI5, a negative voltage input of a differential pair to the ADC.
AI6
AI6
-
-
+
+
-
-
50Ω
Analog Input 1. In analog output current mode, the positive input of the current sense feedback amplifier. In all other modes, either the positive input of a current sense to the ADC with AI2, or a voltage sense to the ADC.
AI1
AI1
CSA
CSA
Positive Transmit Output. Connect to the anode of an external diode.
AOP
AOP
Negative Transmit Output. Connect to the cathode of another external diode.
AON
AON
Analog Input 2. In analog output current mode, the negative input of the current sense feedback amplifier. In all other modes, either the negative input of a current sense to the ADC with AI1, or a voltage sense to the ADC.
AI2
AI2
+
+
-
-
+
+
-
-
MAX22000
MAX22000
+
+
PGA
PGA
DAC
DAC
ADC
ADC
5V to 24V
5V to 24V
Positive High-Voltage Supply for the Output Path. Bypass to AGND with a minimum of 1µF ceramic capacitor as close to the device as possible.
HVDDO
HVDDO
Positive High-Voltage Supply for the Input Paths. Bypass to AGND with a minimum of 1µF ceramic capacitor as close to the device as possible.
HVDD
HVDD
1µF
1µF
2.7V to 3.6V
2.7V to 3.6V
1µF
1µF
2.7V to 3.6V
2.7V to 3.6V
1µF
1µF
Analog Power Supply. Connect a 2.7V to 3.6V source here. Bypass each pin to AGND with a minimum of 1µF ceramic capacitor as close to the device as possible.
AVDD
AVDD
Digital Power Supply. Connect a 2.7V to 3.6V source here. Bypass each pin to DGND with a minimum 1µF ceramic capacitor as close to the device as possible.
DVDD
DVDD
CONFIGURABLE ANALOG IO
CONFIGURABLE
ANALOG IO
Negative High-Voltage Supply for the Output Path. Bypass to AGND with a minimum of 1µF ceramic capacitor as close to the device as possible.
HVSSO
HVSSO
Negative High-Voltage Supply for the Input Paths. Bypass to AGND with a minimum of 1µF ceramic capacitor to AGND.
HVSS
HVSS
1µF
1µF
-5V to -24V
-5V to -24V
Analog Ground
AGND
AGND
Digital Ground
DGND
DGND
DIGITAL INTERFACE
DIGITAL
INTERFACE
DIGITAL ISOLATION
DIGITAL
ISOLATION
DSP
DSP
SENSOR
SENSOR
100pF
100pF
DAC Buffered Reference Voltage Output. Bypass to AGND with a minimum of 100pF ceramic capacitor as close to the device as possible.
REF_DAC
REF_DAC
ADC Buffered Reference Voltage Output. Bypass to AGND with a minimum of 4.7µF ceramic capacitor as close to the device as possible.
REF_ADC
REF_ADC
4.7µF
4.7µF
