Analog inputs power from HVDD and HVSS, and generally need 2.5V of headroom to meet all linearity specifications. Low voltage PGA inputs (±2.5V, ±500mV, ±250mV, and ±125mV) require at least a ±5V supply, as long as both AI5 and AI6 meet the ±2.5V range individually. To accept ±10V inputs, whose full-scale range is ±12.5V, supply the MAX22000 with at least ±15V on HVDD/HVSS.
The analog output powers from HVDDO and HVSSO. For the AOVM ±12.5V setting, power from at least a recommended ±15.2V supply. For the AOVM +25V setting, power HVDDO with at least a recommended +28V and HVSSO with a recommended -5V supply. For any AOCM setting, power from at least a recommended ±22.5V supply. Depending on the application, it might be possible to use lower voltages. Refer to Notes 2 and 6 of the Electrical Characteristics table for further details.
The four supplies, AVDD, DVDD, HVDD/HVSS, and HVDDO/HVSSO can power up in any order. It is recommended to have a minimum delay between respective pairs, such as HVDD and HVSS, HVDDO and HVSSO referenced to AGND.
The only restriction is that HVSS must always be more negative than HVSSO. Refer to the Absolute Maximum Ratings section for all power supply restrictions.
Any external reference voltage on the REF_DAC_EXT pin must never exceed VAVDD. A schottky diode connected between REF_DAC_EXT and AVDD can help satisfy this requirement.
Use proper grounding techniques such as a multilayer board with a low-inductance ground plane.
- Keep DGND separate from AGND, connecting the two at one point.
- Use ground plane shielding to improve noise immunity.
- Keep analog signal traces away from digital signal traces, especially clock traces.
- Connect the exposed pads on the bottom of the MAX22000 to HVSS.
For a detailed recommended layout, refer to the MAX22000 EV kit data sheet.
With external circuitry, the input and output ports are protected against ±1kV/42Ω surge pulses as per IEC610004-5. Place a 36V bidirectional TVS between the output and AGND, past the AOP/AON diodes and past the current sense resistor. Place a minimum 4.7kΩ surge tolerant resistor in series with each input port at risk.
The other MAX22000 pins are rated for Human Body Model (HBM). If surge voltages can couple from the high voltage supplies (HVDD, HVDDO, HVSS, or HVSSO) to the low voltage supplies (DVDD or AVDD), place additional TVS suppressors on these power rails, or place TVS suppressors on the digital signal traces.