Application Circuits
Typical Application Circuits
Optical Heart Rate LED Supply
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Switching Node. Connect to LVLX through a 1μH inductor if BBstFETScale = 0 or a 2.2μH inductor if BBstFETScale = 1.
HVLX
HVLX
Switching Node. Connect to HVLX through a 1μH inductor if BBstFETScale = 0 or a 2.2μH inductor if BBstFETScale = 1.
LVLX
LVLX
Ground
GND
GND
MAX20343 (INTEGRATOR DISABLED)
MAX20343/MAX20344
(INTEGRATOR DISABLED)
Input Supply. Bypass to GND with effective capacitance equal to the minimum of 5µF and the value of the derating curve (Figure 7) for a bias voltage VIN placed as close to the device as possible.
IN
IN
Buck-Boost Output. If BBstFETScale = 0, bypass to GND with effective capacitance equal to twice the value of the derating curve (Figure 7) for a bias voltage VOUT, placed as close to the device as possible. If BBstFETScale = 1, bypass to GND with effective capacitance equal to the value of the derating curve (Figure 7) for a bias voltage VOUT, placed as close to the device as possible.
OUT
OUT
Fast Transient Response. When FAST is high, the quiescent current of MAX20343/MAX20344 increases in order to improve response time to a load step. When FAST is low, the quiescent current is decreased to save power. The function of B1 is determined by the factory configuration of the device. See FastRSEL in Table 3 for the specific configuration of each device.
FAST
FAST
2.2µH
2.2µH
5µF
5µF
4µF
4µF
5V
5V
MAX86140/141 OHR AFE
MAX86140/141
OHR AFE
I2C Serial Data Input/Open-Drain Output. For I2C versions, note the BBstEn setting. If a version is disabled by default an externally supplied source must be used for the I2C interface to enable the output by I2C command.
SDA
SDA
I2C Serial Clock Input. For I2C versions, note the BBstEn setting. If a version is disabled by default an externally supplied source must be used for the I2C interface to enable the output by I2C command.
SCL
SCL
Bypass Capacitor Connection for Internal Supply. Connect through 470nF of capacitance to GND.
CAP
CAP
Interrupt Output. Open-drain, connect through pullup resistor to system logic supply.
INT
INT
1µF
1µF
VBAT
V
BAT
POUT = 1.75W
P
OUT
= 1.75W
LED1_DRV
LED1_DRV
LED2_DRV
LED2_DRV
LED3_DRV
LED3_DRV
VLED
VLED
PD1_IN
PD1_IN
PD_GND
PD_GND
PD2_IN
PD2_IN
3.7V
3.7V
LPWAN Radio Supply
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Switching Node. Connect to LVLX through a 1μH inductor if BBstFETScale = 0 or a 2.2μH inductor if BBstFETScale = 1.
HVLX
HVLX
Switching Node. Connect to HVLX through a 1μH inductor if BBstFETScale = 0 or a 2.2μH inductor if BBstFETScale = 1.
LVLX
LVLX
Ground
GND
GND
MAX20343 (INTEGRATOR ENABLED)
MAX20343/MAX20344
(INTEGRATOR ENABLED)
Input Supply. Bypass to GND with effective capacitance equal to the minimum of 5µF and the value of the derating curve (Figure 7) for a bias voltage VIN placed as close to the device as possible.
IN
IN
Buck-Boost Output. If BBstFETScale = 0, bypass to GND with effective capacitance equal to twice the value of the derating curve (Figure 7) for a bias voltage VOUT, placed as close to the device as possible. If BBstFETScale = 1, bypass to GND with effective capacitance equal to the value of the derating curve (Figure 7) for a bias voltage VOUT, placed as close to the device as possible.
OUT
OUT
Output Voltage Select. Connect a resistor from RSEL to GND based on the desired output voltage. See Figure 6. The function of B1 is determined by the factory configuration of the device. See FastRSEL in Table 3 for the specific configuration of each device.
RSEL
RSEL
1µH
1µH
5µF
5µF
8µF
8µF
5V
5V
LPWAN RADIO
LPWAN RADIO
Input Power Good. LOW indicates that the CAP pin voltage is forced to VOUT and the input voltage is below VIN_UVLO_F when VOUT ≥ 3.3V and the soft-start period is complete. Power capabilities might be limited. If CAP is forced to VIN, INGOOD does not function when VIN < VIN_UVLO_F. It is an open drain output and should be connected to an external logic supply using a pullup resistor.
INGOOD
INGOOD
Enable. Active-high.
EN
EN
Bypass Capacitor Connection for Internal Supply. Connect through 470nF of capacitance to GND.
CAP
CAP
Power Good Output. Indicates when output is ready for use. It is an open drain output and should be connected to an external logic supply using a pullup resistor.
PGOOD
PGOOD
1µF
1µF
VBAT
V
BAT
POUT = 3.5W
P
OUT
= 3.5W
3.7V
3.7V