Detailed Description

Detailed Description

The MAX20343/MAX20344 is an ultra-low quiescent current, non-inverting buck-boost converter with 1A current capability at 3.5V intended for applications that require long run times while also demanding bursts of high current. A peak/valley current-controlled hysteretic architecture yields a fast transient response time with minimal settling time that allows the device to handle large load transients in high peak-power applications. The device has a unique control algorithm that seamlessly transitions between buck, buck-boost, and boost operation to minimize discontinuities and sub-harmonic noise in the output ripple.

The low, 1.9V startup voltage is compatible with a variety of power sources, and the near-zero minimum operating voltage extracts as much energy as possible from the source. Low inductance and capacitance requirements allow for a small total-solution size and make the MAX20343/MAX20344 well-suited for space-constrained applications. The device has a high efficiency and low noise that also makes it suitable for wireless and noise-sensitive applications such as LPWAN and optical sensor systems. It has an ultra-low, 3.5μA (typ) quiescent current and discontinuous conduction mode (DCM) to operate at low loads and extend run time in low average-power, battery-powered applications.

Startup Voltage
The MAX20343/MAX20344 is guaranteed to start up with a minimum input voltage of 1.9V. After device startup, an internal bootstrapping function allows the device to operate down to a 0.5V input. See the  Input Operating Voltage section for more details.
Architectural Description

The MAX20343/MAX20344 buck-boost comprises a typical non-inverting buck-boost topology. Figure 1 illustrates the basic structure of the regulator with arrows depicting the inductor current flow in each switching phase.

Figure 1. The Buck-Boost Regulator and Switching Phases
Figure 2. Buck-Boost Inductor Current in Buck-Boost Mode
Switching Phases

Depending on the buck-boost configurations, the topology enters different sequences of phases to generate the desired output voltage. Only two switches are on in each phase.

  • Phase 1: MP1 on, MP2 on. Inductor charges.
  • Phase 2: MP1 on, MN2 on. Inductor charges.
  • Phase 3: MN1 on, MP2 on. Inductor discharges.
  • Phase 4: MN1 on, MN2 on. Freewheeling.
Buck-Boost Mode
When BBstMode = 0 (register 0x01[2]), the regulator operates in buck-boost mode. The inductor charges in Phase 2 up to BBstIPSet1 (register 0x03[3:0]). The buck-boost then transitions to Phase 1. If VIN > VOUT, the inductor continues charging until either the current reaches BBstIPSet1 + BBstIPSet2 (register 0x03[7:4]) or after a 500ns delay. If VIN ≤ VOUT, the buck-boost waits for the 500ns timeout to elapse or until the current drops to the valley limit. Next, the regulator enters Phase 3 to discharge the inductor current to the valley limit. When the inductor current reaches the valley-current crossing threshold or falls below 0, the regulator freewheels in Phase 4 until the next charge phase. When operating in continuous conduction mode (CCM), the buck-boost enters Phase 4 for approximately 30ns if BBstZCCmpDis = 1 (register 0x01[4]). The buck-boost skips Phase 4 when operating in CCM and BBstZCCmpDis = 0. The valley behavior is determined by BBstZCCmpDis. Figure 2 shows the inductor current in buck-boost mode.
Buck-Only Mode

To maximize efficiency when VIN > VOUT, the buck-boost regulator has a buck-only mode. When BBstMode = 1, the regulator behaves as a synchronously rectified buck regulator. If the device is set to buck-only mode, the regulator never enters Phase 2. Instead, the inductor is always charged in Phase 1. The inductor charges until its current reaches BBstIPSet1 or the 500ns timeout elapses. The regulator then transitions to Phase 3 to provide a path to deliver the inductor current to the output. Figure 3 shows the inductor current in buck-only mode.

Figure 3. Buck-Boost Inductor Current in Buck-Only Mode

Buck-only mode reduces switching losses present in buck-boost mode. Buck-only mode should be used when VOUT is always less than VIN to maximize efficiency.

Inductor Peak and Valley Current Limits

The buck-boost regulator monitors the maximum and minimum values of the inductor current. If BBstIPAdptDis = 1 (register 0x04[1]), the peak currents are fixed to the values in BBstISet (register 0x03) and the valley current is fixed to 0mA. If BBstAdptDis = 0, the peak and valley currents are allowed to change based on load requirements.

Peak currents are set in the BBstISet register. BBstIPSet1 controls the peak current when VIN < VOUT and begins the timeout period for Phase 1. BBstIPSet2 sets a secondary current limit in buck-boost mode when VIN > VOUT. The total inductor current limit when VIN > VOUT is BBstIPSet1 + BBstIPSet2. The buck-boost regulator transitions from Phase 1 to Phase 3 if the inductor current reaches BBstIPSet1 + BBstIPSet2 or if the 500ns timeout has elapsed. Minimizing the difference between BBstIPSet1 and BBstIPSet2 reduces the output ripple, but decreases efficiency. Care must be taken to optimize the peak current settings to keep a low output ripple while maximizing efficiency. Figure 4 presents the safe operating area of BBstIPSet2 with respect to BBstIPSet1. Selecting values outside of the limits shown in Figure 4 can cause unwanted behavior. Figure 5 is a graphical guide to selecting combinations of BBstPSet1 and BBstIPSet2 to balance efficiency for specific BBstVSet values.

In order to control inrush current during startup, the MAX20343/MAX20344 forces discontinuous conduction mode during startup (valley current is always 0) and overrides the peak current settings with BBstIP1SS and BBstIP2SS. Once the output reaches its final voltage, continuous conduction mode is allowed and the BBstIPSet1 and BBstIPSet2 settings are restored. See BBstIP1SS and BBstIP2SS (Table 3) for device-specific values.

The MAX20343/MAX20344 behavior when BBstIPAdptDis = 0 can be further defined with a zero current comparator. The device transitions to Phase 4 when its control loop detects a zero current crossing.

Figure 4. Minimum BBstIPSet2 Limit for Given BBstIPSet1 Setting
Figure 5. Recommended BBstIPSet1 and BBstIPSet2 Settings

When BBstZCCmpDis = 1 (register 0x01[4]), the zero crossing comparator is disabled and the buck-boost operates with only peak and valley current limits. In this configuration, the valley current limit acts as the zero crossing limit. In DCM, the valley limit is 0mA and is a true zero current crossing. In CCM, the peak and valley limits are automatically adjusted by the adaptive current control, so the effective zero current point might be larger than 0mA. This causes the MAX20343/MAX20344 to briefly enter Phase 4 each time the inductor current reaches the valley current threshold before transitioning to an inductor-charging phase. Setting BBstZCCmpDis = 0  enables the zero current comparator and the buck-boost operates with peak, valley, and zero crossing current limits. While the adaptive current loop adjusts the peak and valley currents, the zero crossing limit is fixed at 0mA. In DCM, the regulator functions similarly to when BBstZCCmpDis = 1. However, in CCM, the valley current is greater than the zero crossing current, so the regulator bypasses Phase 4 and directly enters an inductor-charging phase when the inductor current reaches the valley current threshold.

Disabling the zero current crossing comparator reduces the buck-boost output ripple. Enabling the comparator improves efficiency in CCM by removing the Phase 4 stage in CCM that is otherwise present when BBstZCCmpDis = 1.

Integrator Control Loop Disable
The MAX20343/MAX20344 contains an integrator in its control loop for normal operation. This integrator improves the load regulation for larger loads, but increases the transient response time. For applications where the output must quickly settle to a final regulation value to prevent noise injection during sensitive measurements (such as in PPG measurements), the integrator can be disabled so the regulator operates with a proportional-only control loop. The BBstIntegEn bit (register 0x04[2]) enables and disables the integrator to speed response time on load transients (integrator off) or to increase the load capacity (integrator on). Note that when the integrator is disabled output stability is only guaranteed up to the maximum output power for input voltages down to 2.5V. To operate at lower input voltages, the output capacitance must be increased.
Input Operating Voltage

Operating at low input voltages enables a system to extract as much energy as possible from its energy source before shutting down. After startup and with SwoFrcIn = 0, and VOUT ≥ 3.2V, the MAX20343/MAX20344 can operate to very low input voltages limited only by the amount of current that can be drawn effectively from the input. This allows a system to run the MAX20343/MAX20344 well below the minimum startup voltage, albeit at a reduced power capability.

When the input voltage is low, the RON of the input p-channel MOSFET increases. To offset the inherent increase in resistance, an n-channel MOSFET is present in parallel with the input MOSFET. The n-channel MOSFET is only enabled when the input voltage falls below VIN_UVLO_F to reduce switching losses at higher input voltages. In order to provide sufficient overdrive for the n-channel device, it is necessary to keep VOUT ≥ 3.2V. Therefore, high power operation below VIN_UVLO_F is only guaranteed if the output voltage is set to 3.2V or above.

Output Operating Power and Other Optimizations

The MAX20343/MAX20344 is a highly flexible device with many operating modes that allows the user to optimize the performance for their application. For applications like driving an LED for on the wrist PPG, settling time to a steadystate voltage during a load transient is critical. In such cases, the user benefits from a proportional-only output response (BBstIntegEn = 0, disabled), which trades an increased steady-state load regulation error for speed of settling. On the other hand, some applications are not as sensitive to response time, but benefit from the lower steady-state load regulation error provided when the integrator is enabled (BBstIntegEn = 1, enabled).

The efficiency can also be optimized by selecting the BBstFETScale setting according to which load region should be the focus for efficiency. If the application should primarily be optimized for light-load efficiency, the BBstFETScale = 1 (enabled) setting is preferable and vice-versa. Note that the improvement in efficiency at light loads with BBstFETScale = 1 comes with the tradeoff of lower maximum output power, which should be a consideration when configuring the setting. A comparison of performances for each setting can be found in the Typical Operating Characteristics section.

Finally, the MAX20343/MAX20344 features an internal switchover circuit (configured by SwoFrcIN), which manages the supply from which the internal circuitry of the buck-boost is driven. For applications where quiescent current is important and the primary operating mode is to boost the output, the switchover should be forced to the input (SwoFrcIN = 1). This is because the quiescent current when SwoFrcIN = 0 is drawn from the output, meaning that the input current is increased by the boost ratio and the efficiency of the conversion. However, in cases where a low input operating voltage must be supported, the SwoFrcIN = 0 setting allows the input voltage to  drop much lower since the output voltage can be used to enhance the switching FETs of the buck-boost, keeping the on-resistance low. Note that when SwoFrcIN = 1, the buck-boost output automatically shuts down when VIN falls below VIN_UVLO_F (1.782V typ). Instead when SwoFrcIN = 0 and VOUT ≥ 3.2V, the output continues to run even when VIN falls very low and is only disabled when the output voltage falls below VOUT_UVLO_F or when the user disables the device. In this operating mode, the output power capabilities begin to decrease as the input voltage falls. To indicate that the input voltage has fallen to a critical level, the device generates an In UVLO status and interrupt for the system, which means that VIN has dropped below VIN_UVLO_F and the source might be in a critical state. A comparison of performances for each setting can be found in the Typical Operating Characteristics section. For each combination of the above settings, there are tradeoffs to consider. Table 2 below gives a general outline of the basic characteristics to expect with a given configuration.

Device Control
I2C-Controlled

The I2C-controlled versions of MAX20343/MAX20344 enable system flexibility by providing an interface between the device and a host microcontroller. Different parameters of the regulator, such as output voltage the inductor peak current levels, FET scaling, etc., can be optimized in real time for any application. While default values are programmed by the factory, new values can be set in the I2C registers. For device versions with I2C control take special care to observe the default setting of BBstEn in Table 3. Versions with BBstEn = disabled by default need to have another power supply present that allows the system to wake the buck-boost by I2C command. In versions of the MAX20343/MAX20344 with an I2C interface and an RSEL voltage selection pin, the default voltage selected by the RSEL resistor can be overwritten over I2C after the OutGood (register 0x05[1]) status goes high.

The full configuration settings and status information provided through this interface are detailed in the register descriptions. The slave address information for I2C-controlled versions of MAX20343/MAX20344 can be found in the Applications Information section.

Single-Pin-Enabled

In the single-pin-enabled, fixed-programming versions of MAX20343/MAX20344, all configuration settings excluding the output voltage are programmed by the factory and cannot be modified in an application. Setting EN high turns on the buck-boost output and setting EN low turns off the buck-boost output. The BBstEn bit is ineffective in the Single-Pin-Enabled version. Two status pins, INGOOD and PGOOD, signal that the input and output voltages are ready to support the full system power requirements, respectively.

When the FAST/RSEL pin of a single-pin-enabled MAX20343/MAX20344 is configured to RSEL, the output voltage is set by the the RSEL resistor at startup. When the FAST/RSEL pin is configured to FAST, the output voltage is set by the factory.

Dynamic Voltage Scaling (DVS)
The output voltage of I2C-controlled MAX20343/MAX20344 devices can be changed at any point while the device is enabled without restarting the device. This feature is known as dynamic voltage scaling. DVS enables systems to operate at different voltage rails when the voltage or power requirements of the system change in different operating modes. By decreasing the voltage to the minimum value required by an operating mode, the overall system efficiency increases. The output voltage is set in BBstVSet[5:0] (register 0x02[5:0]).
RSEL Voltage Setting

RSEL is a unique, single-resistor output voltage selection method that minimizes quiescent current. Once power is applied at VIN and the enable pin is brought high, the MAX20343/MAX20344 starts up and regulates to the minimum programmable voltage (2.5V). Once an internal PGOOD signal indicates that the voltage has reached an acceptable level, the device begins drawing up to 200µA  from VIN in order to read the resistor value on RSEL. This current is only present during the RSEL resistor detection time, typically 750µs. After the detection and output voltage programming period, the output increases to the set value. The output rise time is determined by the BBstRampEn setting. Figure 6 illustrates this startup sequence.

RSEL has many benefits, including lower cost and smaller size. Only one resistor is needed versus the two resistors required in typical feedback connections. Another benefit of RSEL is that one regulator can be used in multiple projects with different output voltages just by changing a single standard 1% resistor. Lastly, RSEL eliminates wasting current continuously through feedback resistors for ultra-low power, battery-operated products. Select the RSEL resistor value by choosing the desired output voltage in Table 1. Leaving RSEL open sets the output to the default voltage of the device (see Table 3 for device configurations).

Figure 6. MAX20343/MAX20344 RSEL Startup Sequence
Table 1. RSEL SELECTION TABLE
OUTPUT VOLTAGE (V) STD RES 1% (kΩ)
Default OPEN
2.5 590
2.7 422
3.0 301
3.2 210
3.3 150
3.4 105
3.5 75
3.6 53.6
3.7 37.4
3.8 26.7
4.0 18.7
4.2 13.3
4.5 9.31
5.0 6.65
5.5 SHORT
Table 2. Characteristics and Device Settings
CHARACTERISTICS DEVICE SETTINGS
MAX OUTPUT POWER (VIN =
VOUT ≥ 3.2V) (W)
QUIESCENT
CURRENT
OPTIMIZED FOR:
STEADY- STATE LOAD REGULATION ERROR OR LOAD-
TRANSIENT
SETTLING TIME
EFFICIENCY OPTIMIZED CURRENT
RANGE
INPUT OPERATING VOLTAGE
< VIN_UVLO_F
  BBSTFETSCALE BBSTINTEGEN SWOFRCIN
≥ 3.2 INCREASED IN BOOST MODE  
SETTLING TIME
 
HIGH
YES (VOUT ≥ 3.2V)  
0
 
0
 
0
≥ 3.2 LOWEST SETTLING TIME HIGH NO 0 0 1
 
≥ 3.5
INCREASED IN BOOST MODE LOAD REGULATION  
HIGH
YES (VOUT ≥ 3.2V)  
0
 
1
 
0
≥ 3.5 LOWEST LOAD REGULATION HIGH NO 0 1 1
≥ 1.75 INCREASED IN BOOST MODE  
SETTLING TIME
LOW/ MEDIUM YES (VOUT ≥ 3.2V)  
1
 
0
 
0
≥ 1.75 LOWEST SETTLING TIME LOW/ MEDIUM NO 1 0 1
 
≥ 1.75
INCREASED IN BOOST MODE LOAD REGULATION LOW/ MEDIUM YES (VOUT ≥ 3.2V)  
1
 
1
 
0
≥ 1.75 LOWEST LOAD REGULATION LOW/ MEDIUM NO 1 1 1