Detailed Description

The MAX17320 is a 38μA I_Q stand-alone pack-side fuel gauge IC with protector and optional SHA-256 authentication for 2-, 3-, or 4-cell lithium-ion/polymer batteries which implements Maxim's ModelGauge m5 algorithm without requiring host interaction for configuration. This makes the IC an excellent pack-side fuel gauge. The IC monitors the voltage, current, temperature, and state of the battery to ensure that the lithium-ion/polymer battery is operating under safe conditions to prolong the life of the battery. Voltage of each cell of the the battery pack is measured at the CSP or GND/CELL1/CELL2/CELL3/BATTS connections. The total pack voltage is measured at BATTS and PCKP. Current is measured with an external sense resistor placed between the CSP and CSN pins. Power and average power are also reported. Up to four external NTC thermistor connections allow the IC to measure temperature of the cells in the battery pack by monitoring the TH1-4 pins. The TH1-4 pins provide an internal pullup for the thermistor that is disabled internally when temperature is not being measured. Internal die temperature of the IC is also measured and can be a proxy for the protection FET temperature if they are located close by the IC.

The IC provides programmable discharge protection for overdischarge currents (fast, medium, and slow protection), overtemperature, and undervoltage. The IC also provides programmable charge protection for overvoltage, over/undertemperature, overcharge currents (fast and slow), cell imbalance, internal self-discharge, charge done, charger communication timeout, precharge fault, and overcharge capacity fault. The IC provides a fast ideal diode discharge response that allows the battery to provide energy to the system even while the charge fault persists. The IC provides programmable charging current/voltage prescription following 6 JEITA temperature zones as well as step-charging. The IC provides additional protection to permanently disable the battery by overriding a secondary protector or blowing a fuse in severe fault conditions. This is useful when the IC has detected a primary protection FET failure and is unable to block charge/discharge any other way. The IC also modulates the CHG FET to regulate prequalification charge current until the cells cross the prequalification voltage threshold eliminating the need for external precharge circuit. Additional functionality is described in the Protector section.

The IC supports a low-power shutdown mode. The IC enters this low-power mode by command or if communication collapsed (if enabled). The IC wakes up from this low-power mode by communication (if battery voltage is above the undervoltage threshold), charger detection, or pushbutton/system presence wakeup (if enabled and installed). Pushbutton/system presence wakeup allows a pack to completely disconnect from a system during shipping, yet wakeup immediately upon the user pressing the button or detecting the system presence, not needing the user to plug in a charger.

The ModelGauge m5 algorithm combines the short-term accuracy and linearity of a coulomb counter with the long-term stability of a voltage-based fuel gauge, along with temperature compensation to provide industry-leading fuel-gauge accuracy. Additionally, the algorithm does not suffer from abrupt corrections that normally occur in coulomb-counter algorithms, since tiny continual corrections are distributed over time. The  IC automatically compensates for aging, temperature, and discharge rate and provides accurate state-of-charge (SOC) in milliampere-hours (mAh) or percentage (%) over a wide range of operating conditions. Fuel gauge error always converges to 0% as the cell approaches empty. Dynamic power functionality provides the instantaneous maximum battery output power which can be delivered to the system without violating the minimum system input voltage. The IC provides accurate estimation of time-to-empty and time-to-full and provides three methods for reporting the age of the battery: reduction in capacity, increase in battery resistance, and cycle odometer. In addition, age forecasting allows the user to estimate the expected lifespan of the cell.

The IC provides a configurable always-on LDO (1.8V or 3.4V) that can power small critical loads (less than 2mA) inside the battery or on the system side without overloading the cells even under fault conditions.

To prevent battery clones, the IC integrates SHA-256 authentication with a 160-bit secret key. Every IC also incorporates a 64-bit unique identification number (ROM ID). Additionally, up to 84 bytes of user memory (NVM) can be made available to store custom information.

Communication to the host occurs over a Maxim 1-Wire or standard I²C/SMBus interface. SCL/OD is an input from the host, and SDA/DQ is an open-drain I/O pin that requires an external pullup. The ALRT pin is an output that can be used as an external interrupt to the host processor if voltage, current, temperature, state-of-charge, or protection conditions (configurable) are detected. The IC offers a pushbutton feature that can be used to wake up the system after cutting power off from the system using the protection FETs, for the purpose of extending the shelf life of the battery.

For additional reference material, refer to the following Application Notes:

Application Note 7177: MAX17320 Battery Pack Implementation Guide  

Application Note 7161: MAX17320 Host Software Implementation Guide

Lithium-ion/polymer batteries are very common in a wide variety of portable electronic devices because they have very high energy density, minimal memory effect and low self-discharge. However, care must be taken to avoid overheating or overcharging these batteries to prevent damage to the batteries potentially resulting in dangerous outcomes/explosive results. By operating in safe temperature ranges, at safe voltages and current levels, the overall safety of the lithium-ion/polymer batteries can be assured throughout the life of the battery.

Simple protection schemes are available to protect a battery from exceeding the safe levels. These schemes include protection for overdischarge current, short-circuit current, overcharge current, undervoltage, and overvoltage. The next level of protection offers smart protection schemes which include protection for under OCV (SmartEmpty), long overdischarge current, overtemperature limits for charge and discharge, undertemperature charge limits, and charge-done protection. The IC provides all of these simple and smart protection schemes with programmable thresholds and programmable timer delays for each fault.

The IC provides additional protection functionality beyond these schemes as follows:

Discharging Protection Functionality

• Overcurrent: (see nODSCCfg and nODSCTh)
  • Fast Short-Circuit (70μs to 985μs):  The short-circuit hardware comparator is programmable from 5mV to 155mV with delay programmable from 70μs to 985μs.
  • Medium (1ms to 15ms): The overdischarge current hardware comparator is programmable from 2.5mV to 77.5mV with delay programmable from 1ms to 15ms.
  • Slow (351ms to 35s):  Slow overdischarge protection is programmable from 0mV to 51.2mV in 0.2mV steps with delay programmable from 351ms to 35s (see nDelayCfg and nIPrtTh1).
• Overtemperature:
  • Hot (OTPD—Overtemperature Discharge):  Discharge overtemperature (OTPD, see nProtMiscTh) is separately programmable from charge overtemperature (OTPC). OTPD is typically a higher temperature than OTPC, since charging while hot is more hazardous than discharging. OTPD is programmable in 1°C steps, with a programmable timer (see nDelayCfg), and is based on the hottest of the enabled thermistors.
  • Die-Hot:  The IC measures die temperature as well as up to four thermistor temperatures. Since the IC is generally located close to the external FETs, the die temperature can indicate when the FETs are overheating. This separately programmable threshold (see nProtMiscTh) blocks both charging and discharging.
  • Permanent-Fail-Hot:  When a severe overtemperature is detected, the fault is recorded into NVM and permanently disables the charge and discharge FETs and blows the three terminal fuse if enabled.
• Undervoltage (UVP): Undervoltage is protected by two thresholds:  UVP (undervoltage protect) and UOCVP (under OCV protect—SmartEmpty) (see nUVPrtTh register for details).

Charging Protection Functionality:

• Overvoltage (OVP):  Overvoltage protection is programmable with 20mV resolution (see nOVPrtTh). Temperature-region dependent OVP protection is also provided for cold/room/warm and hot temperature regions (see nJEITAV). OVP detection is debounced with a programmable timer (see nDelayCfg). An additional, higher OVP permanent failure threshold is programmable, which records any excessive OVP into NVM and permanently disables the charge and discharge FETs and blows the three terminal fuse if enabled.
• Charge Temperature Protection: Temperature protection thresholds are debounced with a programmable timer (see nDelayCfg) and are based on the hottest and coldest of the enabled thermistors.
  • Hot (OTPC):  Charging temperature protection is programmable with 1°C resolution (see nTPrtTh1).
  • Cold (UTP):  Charging is blocked at cold, programmable with 1°C resolution (see nTPrtTh1).

• Overcharge-Current Protection:
  • ​Fast:  Overcharge current is detected by a programmable hardware comparator and debounce timer between 0mV to 38.75mV and 1ms to 15ms thresholds.
  • Slow:  A lower and slower overcharge-current protection ensures that more moderate high currents do not persist for a long time. Slow overcharge protection is programmable from 0mV to 51.2mV in 0.2mV steps, with an delay programmable between 0.35s and 35s (see nDelayCfg and nIPrtTh1). Additionally, with nNVCfg1.enJP = 1, this overcurrent-protection threshold is modulated according to temperature region (see nJEITAC).
• Charge-Done:  If enabled, the IC turns off the charge FET whenever charge termination is detected according to termination current and timeout. (See nDelayCfg and nIChgTerm). The charge FET is turned on when discharging or charger removal is eventually detected. Also, charging resumes (charge FET turns on) if battery discharges below programmable threshold (VFSOC < FullSOCThr).
• Charger-Communication Timeout:  If enabled, during charging the IC  turns off the charge FET if the host has stopped communicating beyond a timeout configurable from 11s to 3 minutes (see nDelayCfg). In systems which consult the battery for prescribing the charge current or charge voltage, especially to apply JEITA thresholds or step-charging, this feature is useful to protect against uncontrolled charging after an operating system crash or shutdown.
• Overcharge-Capacity Fault:  If any charge session delivers more charge (coulombs) to the battery than the expected full design capacity, charging is blocked, if the feature is enabled. This threshold is programmable as a percentage (see nProtMiscTh.QOvflwTh) beyond the design capacity.
• Cell Imbalance Fault:  During charging the IC monitors the individual cell voltages and, if enabled, turns off the charge FET if any cell imbalance is greater than programmable threshold (see nBalTh.Imbalance).

Other Faults:

• Nonvolatile CheckSum Failure:  If enabled (nNVCfg1.enProtChkSm), the IC blocks charge and discharge when startup checksum of protector NVM does not match the value stored in nProtCfg2.CheckSum.

Other Protection Functionality:

• Zero-Volt Charging:  The IC allows charging when the battery voltage is at or above 4.2V (ZVC disabled). To enable the charging of battery between 0.0V and 4.2V, ZVC must be enabled. A resistor between ZVC and PCKP is used to enable ZVC and set the maximum recovery current. See the Zero-Volt Charging section for more details.
• Overdischarge-Removal Detection:  Following any overdischarge current fault, after the IC turns off the discharge FET, it tests for load removal by sourcing 30μA into PCKP. Load removal is detected when PCKP exceeds 1V. This low threshold is intentionally below the startup voltage of most ICs in order to allow active loads by external ICs while rejecting passive loads by resistors (short-circuit, failed components, etc.).
• Charger Removal Detection:  Following any charge fault, after the IC turns off the charge FET, it measures PCKP to detect the removal of the offending charger. Charger removal is detected when PCKP falls below BATT - nOVPrtTh.ChgDetTh or whenever discharge current is detected.
• Battery Internal Self-Discharge Detection: The IC measures the internal self-discharge of the battery that might indicate health or safety problems. The IC alerts the system or turns off the charge and discharge FETs when a leakage is detected above the configurable threshold. See the Battery Internal Self-Discharge section for more details.
• Ideal-Diode Control: During any charge fault, the charge FET turns on when a discharge current is detected, with up to 350ms delay. This ideal diode behavior reduces the heat and voltage drop associated with the body diode during protection faults. All discharge-only faults are released when the charger is connected. See the Charger Presence and Ideal Diode Behavior section for more details.

Protection Fault Reporting:

• Protection Fault Status:  Each charge and discharge fault state is latched in the ProtStatus register. When the fault is cleared, the corresponding bit is cleared.
• Protection Fault Alerts:  The ProtAlrt register latches the status of any previous faults detected by the device. Once a fault is detected, the corresponding bit remains set until it is cleared by the host. Additionally, the Status.ProtAlrt bit is set when any ProtAlrt bit is set.
• Protection Fault Logging:  The nFaultLog register also indicates which protection events happened during each history log period.

Charging Prescription Registers:  The ChargingVoltage and ChargingCurrent registers can guide the charger according to a recommended charging profile. This can include the following knowledge which generally is associated with a particular battery and may be stored in the battery with the IC:

• Factory Recommended Charging Current and Voltage:  This is useful when a system involves multiple battery vendors, swappable batteries, aftermarket batteries, or legacy system support.
• Charging Modifications According to Battery Temperature:  Significantly above and below room temperature, most cell manufacturers recommend charging at reduced current and lower termination voltage to assure safety and improve lifespan. The IC modulates its guidance according to TooCold/Cold/Room/Warm/Hot/TooHot programmable temperature regions (see nTPrtTh1/2/3). Both charging current and voltage are modulated at Cold/Warm/Hot, targeting charge settings lower than Room (see nJEITAV and nJEITAC).
• Step-Charging: A common practice to balance lifespan and charge speed is to apply step-charging profiles (see the Step-Charging section). The IC supports three programmable steps with programmable charge currents and voltages.

At a high level, the IC protector has dual state-machines as shown in Figure 1. Each charge and discharge fault state is latched in the ProtStatus register, where each fault obeys a separate instance of the state machine shown in Figure 1. Any single charge fault opens the charge FET to block charge current (charge faults are OR'd together). All charge faults must be released to allow charge to resume (charge fault release conditions are AND'd together). The behavior is similar for blocking discharge.

The IC includes a write protection and a permanent locking function. The write protection prevents accidental overwrites of protection parameters. This protection must be cleared before updating any registers and should be set after configuration changes are made. The permanent locks prevent intentional or malicious tampering, and should be enabled after development is completed and the battery pack is ready to ship in production. See the Memory Locks and Write Protection section for more details.

The protector registers are summarized by their protection function in Table 1 and are graphically shown across the various temperature ranges in Figure 2 and Figure 3.

The IC provides for a variety of programmable protector thresholds that are stored in nonvolatile memory. These thresholds are for voltage, current, temperature, and timer delays.

All of the voltage thresholds of the IC are shown graphically in Figure 2 and in table form with details of each threshold and the registers used to set the various thresholds in Table 2. The description of each register provides additional guidance for selection of the register value.

Standard undervoltage protection protects the cell voltage from dropping below a certain threshold to protect the battery from reaching an overdischarged state. When a lithium-ion/polymer cell stays in undervoltage state for a long time, it is important to prevent the lithium-ion/polymer cell from eventually discharging to very deep discharged states like 2.0V or even 0V. Staying in a deep-discharge state for a long time can result in a lithium-ion/polymer battery aging faster or going into a hazardous state.

Therefore, the standard objective for lithium-ion/polymer protection when overdischarged is:

The standard protection is a voltage choice, undervoltage protection (UVP).

The load on the battery greatly influences the state corresponding with the UVP threshold. When the cell voltage reaches the UVP threshold and the protection circuit opens the discharge FET, the cell voltage relaxes to reveal the actual state of the battery as shown in Figure 4. When heavy pulsed loads are placed on the cell, the cell voltage may reach the undervoltage threshold when there is still ~15% of the battery capacity remaining which results in wasted run-time for the application. Additionally, very small loads can allow the battery to be very deeply discharged, potentially damaging the cell, before reaching the undervoltage threshold.

The IC provides SmartEmpty functionality which relies on the fuel gauge's reported state-of-charge to determine empty in the application as opposed to using the predefined UVP threshold. SmartEmpty is not influenced by the load and opens up the discharge FET when the battery reaches the empty state, as shown in Figure 5. The IC continues to protect against higher loads from dropping the cell voltage below the lowered UVP threshold, as shown in Figure 5.

All of the current thresholds of the IC are shown graphically in Figure 3 and in table form with details of each threshold in Table 3. The description of each register provides additional guidance for selection of the register value. See Figure 6 for timing details on current thresholds.

The IC provides three levels of protection for overdischarge current events: fast, medium, and slow as shown in Figure 6. The IC also provides fast and slow levels of protection for overcharge-current protection. The fast and medium levels of protection are provided by hardware comparators and the slow levels are based on the ADC readings.

The IC maintains the protection until the source of the fault has been removed. Overcharge-protection fault releases when discharge is detected. Overdischarge current (fast or slow) or short-circuit current protection faults release when PCKP rises above 1V, while the IC applies 30μA source current test to PCKP or when charger is detected. See the Charger Presence and Ideal Diode Behavior section for details.

The IC contains three fast overcurrent comparators called Overdischarge (OD), Short-Circuit (SC), and Overcharge (OC) that allow control protection. These comparators have programmable threshold levels and programmable debounced delays. See Figure 7.

The nODSCTh register sets the threshold levels where each comparator trips. The nODSCCfg register enables each comparator and sets their debounce delays. The nODSCCfg register also maintains indicator flags of which comparator has been tripped. These register settings are maintained in nonvolatile memory if the nNVCfg1.enODSC bit is set.

The six temperature zones shown in Figure 2 and Figure 3 can be configured in the nTPrtTh1 (Too-hot and Too-cold), nTPrtTh2 (Hot and Cold), and nTPrtTh3 (TPermFailHot and Twarm) registers.

The IC provides additional protection for suspending charge when full charge is detected or when communication with a charger has stopped as described in Table 4. The IC can also detect if the CHG FET or DIS FET has failed and alert the secondary protector to activate. Some chargers can request the desired charge voltage and charge current from the battery. The IC provides a six-zone JEITA charge prescription that can be read by the charger from the ChargeVoltage and ChargeCurrent registers.

A healthy lithium-ion/polymer battery has a very high coulombic-efficiency, typically greater than 99.9% (defined as discharge mAh vs. charge mAh). Some portion of the charge capacity can be lost by internal self-discharge. This includes natural aging, which is exacerbated if the battery stays at a high temperature and/or high state for long periods of time. However, in a damaged battery, additional capacity can be lost (unavailable for discharge), and some portion of this reflects permanent capacity loss. Unusual self-discharge in a lithium-ion/polymer battery might indicate health or safety problems.

The MAX17320 internal self-discharge (ISD) detection feature measures battery leakage and provides the following functions:

• Leakage Measurement. The LeakCurrRep register outputs the milliampere leakage measured across many days and multiple charge termination events.
  • Accurate leakage detection
  • Low ppm false-positive rate at a 3mA threshold
  • Detection during normal use
    • No discharge depth or duration constraints
    • Requires at least four full events, each separated by 20 hours or more
• Leakage Log. Leakage measurements are recorded in the battery-life-logging data. This reveals leakage vs. time for any returned battery or for managing deployed packs.
• Leakage Alert. If enabled, when LeakCurrRep exceeds the programmable alert threshold, an LDET alert (see ProtAlrt) is asserted.
• Leakage Fault. If enabled, when LeakCurrRep exceeds the programmable fault threshold, the protector disconnects the battery.

Example of Internal Self-Discharge Detection

Figure 8 shows the current leakage the MAX17320 detects as a result of placing a 909Ω resistor across a cell to emulate a battery with internal self-discharge over various temperatures.

Configuring ISD

​Contact Maxim for configuring the ISD Feature. See the Battery Internal Self-Discharge Registers section for configuration details.

During a charge fault, if there is a discharge current, the current flows through the body diode of the CHG FET and potentially overheats and damages the FET. To prevent this, the IC turns on the CHG FET when discharging is detected. When a charger is detected, the CHG FET turns off again to continue protecting against the charge fault.

The IC uses several methods to detect charge and discharge to provide the following "Ideal Diode" discharge control without forgetting a possible charge fault state such as OVP, OTP, or UTP. Overcharge current is fully released during a discharge condition.

1. Fast CHG FET On.  When discharge is detected, the CHG FET quickly turns on regardless of any charge fault condition. This limits the heat due to the CHG FET body diode conduction.
   • Current < -CurrDet.  nProtMiscTh.CurrDet is normally configured to a setting of 2 to provide a clear threshold relative to ADC noise. With a 5mΩ sense resistor, this corresponding to 15mA, provides sufficient sensitivity for most active loads.
   • PCKP < BATT + nOVPCfg.ChgDetTh (PCKP voltage falling only).  Additionally, a comparator detects charger removal to support better discharging detection even during small standby currents.
2. Fast CHG FET Off. When discharge to charge transition is detected while a charge fault (such as OTP/OVP/UTP) remains latched, the CHG FET quickly turns off to prevent charging. Since the charge fault remains remembered (not released by the discharging), the response happens quickly without waiting for the debounce timer.
3. Slow CHG FET On. The CHG Fet turns on when AvgCurrent < -AvgCurrDet. For default configuration with 5mΩ, AvgCurrDet is sensitive to 2.8mA discharge. The AvgCurrDet threshold follows the filter configuration nFilterCfg.nCurr as well as the hibernate state and configuration according to Table 5 when using default nProtMiscTh.CurrDet = 15mA.

4. Slow CHG FET Off. AvgCurrent > AvgCurrDet. If the CHG FET is on for any of the above reasons, the CHG FET turns off while the charge fault persists and the average discharge current is less than AvgCurrDet.

The IC supports several types of faults which result in a permanent failure. When any enabled permanent failure is detected, both FETs turn off and remain off regardless of power-cycling. When any permanent failure fault is detected, the nBattStatus.PermFail bit is set in addition to the specific fault bit (also in nBattStatus), and both FET drivers are put in the off state. Furthermore, the PFAIL output drives high to either drive an external fuse or latch a secondary protector. This action is useful when FET failure is detected since charge and discharge can not be blocked in any other way.

The following permanent failure faults are supported whenever permanent failures are enabled (nProtCfg.PFEn = 1) and the condition persists longer than the Permanent Fail debounce timer (nDelayCfg.PermFailTimer).

• FET Failures:  Enable/disable this feature by configuring nProtCfg.FetPFEn.
  • ​DIS FET Shorted: If discharging is detected during discharge fault, nBattStatus.DFETFs is set and written to NVM.
  • CHG FET Shorted:  If charging is detected during charge fault, nBattStatus.CFETFs is set and written to NVM.
  • ​FET Open Failure:  If either FET is detected open by the detection methods below:
    • ​Detected By Discharge Fail:  If DIS = On and V_PCKP < 1.5V and discharge current is not detected, nBattStatus.FETFo is set and written to NVM.
    • Detected By Charge Fail:  If CHG = On and DIS = On and V_PCKP > V_BATT + ChgDet and charge current is not detected, nBattStatus.FETFo is set and written to NVM.
• Severe Overvoltage Failure:  If any cell voltage exceeds nOVPrtTh.OVPPermFail, nBattStatus.OVPF is set and written to NVM. Disable by configuring nOVPrtTh.OVPPermFail to the maximum value of 5.12V (FF__h).
• Severe Overtemperature Failure:  If Temp exceeds nTPrtTh3.TpermFailHot, nBattStatus.OTPF is set and written to NVM. Disable by configuring OTPPermFail to the maximum value of 127°C (7F__h).
• Severe Battery Internal Self-Discharge Detection: If enabled to measure internal self-discharge and configured to be treated as a severe fault when the leakage current exceeds the fault threshold (see the Battery Internal Self Discharge Detection Registers for configuration details), nBattStatus.LDet is set and written to NVM.
• Nonvolatile Protector Checksum Failure:  If enabled (nNVCfg1.enProtChkSum), during startup a checksum of the protector configuration is calculated and compared against the nChkSum register. If the value mismatches, nBattStatus.ChkSumF is set.

When in undervoltage-protection, the IC turns both FETs off and then enters a low quiescent state. After a long time in the undervoltage state, it is possible for the battery voltage to fall below the minimum 4.2V (pack voltage) operating voltage, making it unable to wakeup by communications or pushbutton-wakeup. In this situation, an external charge voltage must be applied to PCKP in order to wake up the IC. If enabled, the IC allows a small recovery current to gently recover the battery voltage.

The recovery current is set by the R_ZVC resistor between the PCKP and ZVC pins as shown in Figure 9. Zero-volt charge recovery can be disabled by depopulating the resistor. The maximum recovery current is calculated as: 

When the battery is severely depleted and the IC detects that a charger has been connected, the ZVC path is enabled and the recovery current begins to flow as shown in Figure 9. The recovery current continues until the IC determines that the battery voltage has recovered enough to transfer control to the prequalification or normal charge control at which time it disconnects the ZVC path.

The IC provides appropriate charging voltage and charging current to safely charge the battery depending on the state of the battery and the temperature. The ChargingVoltage and ChargingCurrent registers provide the information according to the recommended charging based on knowledge that is installed in the battery. This information can be stored in the IC to provide the recommended charging current and voltage. This is useful when a system involves multiple battery vendors, swappable batteries, aftermarket batteries, or legacy system support.

As the temperature of the battery changes significantly above and below room temperature, most cell manufacturers recommend charging at reduced current and lower termination voltage to assure safety and improve lifespan. The IC can be configured to change its guidance according to TooCold/Cold/Room/Warm/Hot/TooHot programmable temperature zones (see nTPrtTh1/2/3). Both charging current and voltage are updated at Cold/Warm/Hot (see nJEITAV and nJEITAC). See Figure 2 and Figure 3.

Additionally, the IC provides a step-charging prescription to improve the lifespan of the battery and charge speed by applying a step-charging profile (see the Step Charging section) as shown in Figure 10.

A step-charging profile sets three charge voltages, three corresponding charge currents, and manages a state-machine to transition through the stages as shown in Figure 10.

This breaks charging into three stages:

​Stage 0: Highest current, lowest voltage. ChargingCurrent comes from nJEITAC until VCell > StepVolt0. After VCell > StepVolt0, ChargingCurrent becomes defined by Stage 1.

Stage 1: Medium current. ChargingCurrent comes from nJEITAC x (StepCurr1 + 1)/16, which is a ratio from 1/16 to 16/16 until VCell > StepVolt1. When VCell > StepVolt1, ChargingCurrent becomes defined by Stage 2.

Stage 2: Reduced current until full. ChargingCurrent comes from nJEITAC x (StepCurr2 + 1)/16, which is a ratio from 1/16 to 16/16 until full.

For example, a charge may start with a ChargingCurrent of 2000mA until the cell voltage reaches 4.12V. At that point, the ChargingCurrent is reduced to 1000mA until the cell voltage reaches 4.16V. Then, the ChargingCurrent is further reduced to 500mA where it remains until the current begins to taper off naturally to the termination current.

The IC provides FET override control by either I²C command or pin-command to the ALRT pin. This functionality can be useful for various types of applications:

• Factory Testing.  Disconnecting the battery is useful for testing with a controlled external power supply.
• Battery Selection. In a multiple battery system, one battery can be disconnected and another connected by operating the FETs.
• Ship Mode. The last step in the battery or system factory could be to disable the FETs to disconnect power to the system to prevent the battery from draining during shipment, or when the system is in the warehouse or store shelf.

When allowed by Nonvolatile configuration, both FETs can be turned off by pin control or either FET can be individually turned off by I²C command. The control operates as follows:

• ALRT Pin Override.  Set nProtCfg.OvrdEn = 1 and drive ALRT low to force both FETs into the off state. Releasing the ALRT line recovers the FETs according to the protector's fault state machine. Alert pin output is not functional in this mode.
• I²C Command Override.  Set nProtCfg.CmOvrdEn = 1 and write CommStat.CHGOff or CommStat.DISOff to independently disable either the charge or discharge FET. Clearing CHGOff and DISOff recovers the FETs according to the protector's fault state machine.

These features can be disabled and locked by nonvolatile memory to prevent system code from disabling the FETs. Although disabling FETs does not produce any safety issue, it can be a nuisance if system-side software denies power to the system.

Classical coulomb-counter-based fuel gauges have excellent linearity and short-term performance. However, they suffer from drift due to the accumulation of the offset error in the current-sense measurement. Although the offset error is often very small, it cannot be eliminated, causes the reported capacity error to increase over time, and requires periodic corrections. Corrections are usually performed at full or empty. Some other systems also use the relaxed battery voltage to perform corrections. These systems determine the true state-of-charge (SOC) based on the battery voltage after a long time of no current flow. Both have the same limitation; if the correction condition is not observed over time in the actual application, the error in the system is boundless. The performance of classic coulomb counters is dominated by the accuracy of such corrections. Voltage measurement based SOC estimation has accuracy limitations due to imperfect cell modeling, but does not accumulate offset error over time.

The IC includes an advanced voltage fuel gauge (VFG), which estimates OCV, even during current flow, and simulates the nonlinear internal dynamics of a Li+ battery to determine the SOC with improved accuracy. The model considers the time effects of a battery caused by the chemical reactions and impedance in the battery to determine SOC. This SOC estimation does not accumulate offset error over time. The IC performs a smart-empty-compensation algorithm that automatically compensates for the effects of temperature and load conditions to provide accurate state-of-charge information. The converge-to-empty function eliminates error toward empty state. The IC learns battery capacity over time automatically to improve long-term performance. The age information of the battery is available in the output registers.

The ModelGauge m5 algorithm combines a high-accuracy coulomb counter with a VFG. See Figure 11. The complementary combined result eliminates the weaknesses of both the coulomb counter and the VFG while providing the strengths of both. A mixing algorithm weighs and combines the VFG capacity with the coulomb counter and weighs each result so that both are used optimally to determine the battery state. In this way, the VFG capacity result is used to continuously make small adjustments to the battery state, canceling the coulomb-counter drift.

The ModelGauge m5 algorithm uses this battery state information and accounts for temperature, battery current, age, and application parameters to determine the remaining capacity available to the system. As the battery approaches the critical region near empty, the ModelGauge m5 algorithm invokes a special error correction mechanism that eliminates any error.

The ModelGauge m5 algorithm continually adapts to the cell and application through independent learning routines. As the cell ages, its change in capacity is monitored and updated and the voltage-fuel-gauge dynamics adapt based on cell-voltage behavior in the application.

ModelGauge m5 EZ performance provides plug-and-play operation of the IC. While the IC can be custom tuned to the applications battery through a characterization process for ideal performance, the IC has the ability to provide reasonable performance for most applications with no custom characterization required.

While EZ performance provides reasonable performance for most cell types, some chemistries such as lithium-iron-phosphate (LiFePO₄) and Panasonic NCR/NCA series cells require custom characterization for best performance. EZ performance provides models for applications with empty voltages ranging from 3.0V to 3.4V through the EV kit GUI Configuration Wizard. Contact Maxim for details of the custom characterization procedure.

The core of the ModelGauge m5 algorithm is a mixing algorithm that combines the OCV state estimation with the coulomb counter. After power-on reset of the IC, coulomb-count accuracy is unknown. The OCV state estimation is weighted heavily compared to the coulomb count output. As the cell progresses through cycles in the application, coulomb-counter accuracy improves and the mixing algorithm alters the weighting so that the coulomb-counter result is dominant. From this point forward, the IC switches to servo mixing. Servo mixing provides a fixed magnitude continuous error correction to the coulomb count, up or down, based on the direction of error from the OCV estimation. This allows differences between the coulomb count and OCV estimation to be corrected quickly. See [[Voltage and Coulomb Count Mixing]].

The resulting output from the mixing algorithm does not suffer accumulation drift from current measurement offset error and is more stable than a stand-alone OCV estimation algorithm. See Figure 13. Initial accuracy depends on the relaxation state of the cell. The highest initial accuracy is achieved with a fully relaxed cell.

As the temperature and discharge rate of an application changes, the amount of charge available to the application also changes. The ModelGauge m5 algorithm distinguishes between the remaining capacity of the cell, remaining capacity of the application, and reports both results to the user.

The MixCap output register tracks the charge state of the cell. This is the theoretical mAh of charge that can be removed from the cell under ideal conditions—extremely low discharge current and independent of cell voltage. This result is not affected by application conditions such as cell impedance or minimum operating voltage of the application. ModelGauge m5 continually tracks the expected empty point of the application in mAh. This is the amount of charge that cannot be removed from the cell by the application because of the minimum voltage requirements and internal losses of the cell. The IC subtracts the amount of charge not available to the application from the MixCap register and reports the result in the AvCap register.

Since the available remaining capacity is highly dependent on the discharge rate, the AvCap register can be subject to large instantaneous changes as the application load current changes. The result can increase, even while discharging if the load current suddenly drops. This result, although correct, can be very counter-intuitive to the host software or end-user. The RepCap output register contains a filtered version of AvCap that removes any abrupt changes in remaining capacity. RepCap converges with AvCap over time to correctly predict the application empty point while discharging or the application full point while charging. Figure 14 shows the relationship of these registers.

The IC detects the end of a charge cycle when the application current falls into the band set by the IChgTerm register value while the VFSOC value is above the FullSOCThr register value. By monitoring both the Current and AvgCurrent registers, the device can reject false end-of-charge events such as application load spikes or early charge-source removal. See the End-of-Charge Detection graph in the Typical Operating Characteristics and Figure 15. When a proper end-of-charge event is detected, the device learns a new FullCapRep register value based on the RepCap register output. If the old FullCapRep value was too high, it is adjusted on a downward slope near the end-of-charge as defined by the MiscCfg.FUS setting until it reaches RepCap. If the old FullCapRep was too low, it is adjusted upward to match RepCap. This prevents the calculated state-of-charge from ever reporting a value greater than 100%. See Figure 16.

Charge termination is detected by the IC when the following conditions are met:

• VFSOC register > FullSOCThr register

• AND IChgTerm x 0.125 < Current register < IChgTerm x 1.25

• AND IChgTerm x 0.125 < AvgCurrent register < IChgTerm x 1.25

The IC periodically makes internal adjustments to cell characterization and application information to remove initial error and maintain accuracy as the cell ages. These adjustments always occur as small under-corrections to prevent instability of the system and prevent any noticeable jumps in the fuel-gauge outputs. Learning occurs automatically without any input from the host. In addition to estimating the battery’s state-of-charge, the IC observes the battery’s relaxation response and adjusts the dynamics of the voltage fuel gauge. Registers used by the algorithm include:

• Application Capacity (FullCapRep Register). This is the total capacity available to the application at full, set through the IChgTerm and FullSOCThr registers as described in the End-of-Charge Detection section. See the FullCapRep register description.

• Cell Capacity (FullCapNom Register). This is the total cell capacity at full, according to the voltage fuel gauge. This includes some capacity that is not available to the application at high loads and/or low temperatures. The IC periodically compares percent change based on an open circuit voltage measurement vs. coulomb-count change as the cell charges and discharges, maintaining an accurate estimation of the pack capacity in mAh as the pack ages. See Figure 17.

• Voltage Fuel-Gauge Adaptation. The IC observes the battery’s relaxation response and adjusts the dynamics of the voltage fuel gauge. This adaptation adjusts the RComp0 register during qualified cell relaxation events.

• Empty Compensation. The IC updates internal data whenever cell empty is detected (VCell < VEmpty) to account for cell age or other cell deviations from the characterization information.

The IC includes a feature that guarantees the fuel gauge output converges to 0% as the cell voltage approaches the empty voltage. As the cell's voltage approaches the expected empty voltage (AvgVCell approaches VEmpty) the IC smoothly adjusts the rate of change of RepSOC so that the fuel gauge reports 0% at the exact time the cell's voltage reaches empty. This prevents minor over or under-shoots in the fuel gauge output. See Figure 18.

To determine the true accuracy of a fuel gauge, as experienced by end-users, the battery should be exercised in a dynamic manner. The end-user accuracy cannot be understood with only simple cycles. To challenge a correction-based fuel gauge, such as a coulomb counter, test the battery with partial loading sessions. For example, a typical user may operate the device for 10 minutes and then stop use for an hour or more. A robust test method includes these kinds of sessions many times at various loads, temperatures, and duration. Refer to the Application Note 4799: Cell Characterization Procedure for a ModelGauge m3/ModelGauge m5 Fuel Gauge.

The IC uses the first voltage reading after power-up or after cell is connected to the IC to determine the starting output of the fuel gauge. It is assumed that the cell is fully relaxed prior to this reading; however, this is not always the case. If there is a load or charge current at this time, the initial reading is compensated using the characterized internal impedance of the cell to estimate the cell's relaxed voltage. If the cell was recently charged or discharged, the voltage measured by the IC may not represent the true state-of-charge of the cell, resulting in initial error in the fuel gauge outputs. In most cases, this error is minor and is quickly removed by the fuel-gauge algorithm during the first hour of normal operation.

Register Type: Special

Nonvolatile Restore: There is no associated restore location for this register.

The nAgeFcCfg register is used to configure the age forecasting functionality. Register data is nonvolatile and is typically configured only once during pack assembly. Table 6 shows the register format.

DeadTargetRatio: Sets the remaining percentage of initial cell capacity where the cell is considered fully aged. DeadTargetRatio can be adjusted between 75% and 86.72% with an LSb of 0.7813%. For example, if age forecasting was configured to estimate the number of cycles until the cell’s capacity dropped to 85.1574% of when it was new, DeadTargetRatio should be programmed to 1101b.

CycleStart: Sets the number of cell cycles before age forecasting calculations begin. CycleStart has a range of 0.00 to 81.92 cycles with an LSb of 0.64 cycles. Since age forecasting estimation becomes more accurate over time, most applications use a default value of 30 cycles.

0: Always write this location 0.

1: Always write this location 1.

Register Type: Special

Nonvolatile Backup: None

The AgeForecast register displays the estimated cycle life of the application cell. The AgeForecast value should be compared against the Cycles (017h) register to determine the estimated number of remaining cell cycles. This is accomplished by accumulating the capacity loss per cycle as the cell ages. The result becomes more accurate with each cycle measured. The AgeForecast register has a full range of 0 cycles to 16383 cycles with a 25% LSb. This register is recalculated from learned information at power-up.

There are several requirements for proper operation of the age forecasting feature as follows:

3. Age forecasting requires a custom characterized battery model to be used by the IC. Age forecasting is not valid when using the default model.

The following steps are required to enable the age forecasting feature:

1. Set nNVCfg2.enVT = 0. This function conflicts with age forecasting and must be disabled.

2. Set nFullCapFlt to the value of nFullCapNom.

3. Set nVoltTemp to 0001h.

4. Set nNVCfg0.enAF = 1 to begin operation.

The IC has the ability to log learned battery information providing the host with a history of conditions experienced by the cell pack over its lifetime. The IC can store up to 100 snapshots of page 1Ah in nonvolatile memory. Individual registers from page 1Ah are summarized in Table 8. Their nonvolatile backup must be enabled in order for logging to occur. See each register's detailed description in other sections of this data sheet. The logging rate follows the "Fibonacci Saving" interval to provide recurring log-saving according to the expected battery lifespan and is configured as shown in Table 96. See the 100 Record Life Logging section for more details.

Figure 20 shows a graphical representation of sample history data read from an IC. Analysis of this data can provide information about cell performance over its lifetime as well as to detect any application anomalies that may have affected performance.

While logging data, the IC begins on history page 1 and continues until all history memory has been used at page 100. Prior to reading history information out of the IC, the host must determine which history pages has been written and which, if any, had write errors and should be ignored. Each page of history information has two associated write flags that indicate if the page has been written and two associated valid flags which indicate if the write was successful. The HISTORY RECALL command [E2XXh] is used to load the history flags into page 1Fh of IC memory where the host can then read their state. Table 9 shows which command and which page 1Fh address has the flag information for a given history page. For example, to see the write flag information of history pages 1-8, send the E29Ch command then read address 1F2h. To see the valid flag information of pages 1-8, send the E29Ch command and then read address 1FFh.