Pin Specifications

Pin Description
PIN	NAME	FUNCTION
1	V_DD	Supply Input. Bypass V_DD to ground with a 0.1µF capacitor.
2	IN	Monitoring Input. IN monitors for undervoltage/overvoltage faults with respect to nominal input threshold. When V_IN falls outside the the undervoltage/overvoltage thresholds window, RST asserts and stays asserted for reset timeout period after V_IN falls within undervoltage/overvoltage thresholds window.
3	WDI	Watchdog Input. The internal watchdog timer clears to zero on the falling edge of WDI or when RST goes high. If WDI sees another falling edge within the factory-trimmed watchdog window, WDO will remain de-asserted. Transitions outside this window, either faster or slower, will cause WDO to pulse low. WDI must not be left floating. Connect to ground with 100kΩ resistor to ensure proper device operation. See Window Watchdog Operation for more detail.
4	GND	Ground
5	CLR	Clear Input. Pull CLR low for a pulse duration of t_CLR to clear the overvoltage fault output at (OV) after the overvoltage condition is removed. CLR has a 50kΩ internal pull up to V_DD.
6	WDO	Open-Drain Watchdog Output. WDO asserts low for 50ms when two consecutive falling transitions on WDI are shorter than t_{WD_F}. WDO asserts low for 100ms when two consecutive falling transitions on WDI is longer than t_{WD_S}. See Window Watchdog Operation for more detail.
7	RST	Open-Drain Reset Output. RST asserts low when V_IN falls outside of the undervoltage/overvoltage threshold's window. The reset output deasserts after the reset timeout period when V_IN enters the undervoltage/overvoltage threshold's window.
8	OV	Overvoltage Fault Output. OV latches low when the voltage at IN exceeds the overvoltage threshold setting. To clear the latch, pull CLR low for t_CLR pulse width duration.
-	EP	Exposed pad. Connect EP to GND to improve heat dissipation capability. Add thermal vias below the exposed pad.

1

V_DD

Supply Input. Bypass V_DD to ground with a 0.1µF capacitor.

2

IN

Monitoring Input. IN monitors for undervoltage/overvoltage faults with respect to nominal input threshold. When V_IN falls outside the the undervoltage/overvoltage thresholds window, RST asserts and stays asserted for reset timeout period after V_IN falls within undervoltage/overvoltage thresholds window.

3

WDI

Watchdog Input. The internal watchdog timer clears to zero on the falling edge of WDI or when RST goes high. If WDI sees another falling edge within the factory-trimmed watchdog window, WDO will remain de-asserted. Transitions outside this window, either faster or slower, will cause WDO to pulse low. WDI must not be left floating. Connect to ground with 100kΩ resistor to ensure proper device operation. See Window Watchdog Operation for more detail.

4

GND

Ground

5

CLR

Clear Input. Pull CLR low for a pulse duration of t_CLR to clear the overvoltage fault output at (OV) after the overvoltage condition is removed. CLR has a 50kΩ internal pull up to V_DD.

6

WDO

Open-Drain Watchdog Output. WDO asserts low for 50ms when two consecutive falling transitions on WDI are shorter than t_{WD_F}. WDO asserts low for 100ms when two consecutive falling transitions on WDI is longer than t_{WD_S}. See Window Watchdog Operation for more detail.

7

RST

Open-Drain Reset Output. RST asserts low when V_IN falls outside of the undervoltage/overvoltage threshold's window. The reset output deasserts after the reset timeout period when V_IN enters the undervoltage/overvoltage threshold's window.

8

OV

Overvoltage Fault Output. OV latches low when the voltage at IN exceeds the overvoltage threshold setting. To clear the latch, pull CLR low for t_CLR pulse width duration.

-

EP

Exposed pad. Connect EP to GND to improve heat dissipation capability. Add thermal vias below the exposed pad.