Detailed Description

The MAX14914 family of parts is a high-side/push-pull driver that operates as an industrial digital output and can also operate as an industrial digital input. The MAX14914 family is specified for operation with supplies up to 40V. The high-side switch current limiting is resistor settable from 135mA (min) to 1.3A (min). The high-side driver on-resistance is 120mΩ (typ) and 240mΩ (max) at +125°C ambient temperature. Optional push-pull operation allows driving of cables and fast discharge of load capacitance. A separate digital DOI_LVL allows supervision of the DOI voltage in DO mode for safety applications. The MAX14914 family complies with IEC Type 1, Type 2, or Type 3 input characteristics when configured for digital input operation.

The difference between the MAX14914, MAX14914A and MAX14914B versions is summarized in Table 1, and the summary of the control signals is shown in Table 2.

The MAX14914 family requires a 5V supply on the V₅ pin for normal operation. This 5V supply can come from an external supply or from the internal 5V linear regulator. Connect REGIN pin to V_DD to enable the internal regulator. Connect REGIN pin to V₅ pin to disable the internal regulator, when an external 5V is used. The internal 5V regulator also can power the external loads/circuits with of up to 20mA.

The logic interface features flexible logic levels, allowing interfacing to a wide range of common logic. The V_L supply input defines the logic levels and can be set in the range of 2.5V to 5.5V. Connect a 0.1µF capacitor to V_L.

The driver can be configured for high-side (PP pin is driven low) or push-pull (PP pin is driven high) operation. In DO high-side mode, the DOI output voltage is high (V_DD) when the logic level on IN pin is high, and three-state (Hi-Z), when the logic level on IN pin is low. In DO Push-Pull mode, the DOI output voltage follows the logic level on IN pin. The high-side driver has 240mΩ (max) on-resistance at 500mA and T_A = 125°C. The DOI voltage can go below ground, as will occur during inductive load demagnetization. An internal clamping diode limits the negative excursion to (V_DD - V_CL). See Driving Inductive Loads for details. The low-side (LS) switch speeds up the discharge of RC loads in Push-Pull mode.

The MAX14914A features a low-leakage mode in which the DOI leakage current is less than 0.4μA with temperature up to +85°C and DOI between 0V and +15V. This is useful when the DOI pin is connected to an analog input/output (I/O) line and does not affect the performance of the analog I/O device. Low-leakage mode is enabled when the V_L voltage is held low below V_{L_POR} (min) = 1.12V. Note that the logic inputs, like IN, DI_EN and PP, can be held high or low in low-leakage mode.

The MAX14914 family has a settable current limiting of the HS switch. The load current is limited to between 135mA (min) and 1.3A (min), depending on the value of the resistor used at the CLIM pin. A short-circuit or overcurrent generally creates a temperature rise in the chip; both the HS and LS FET’s temperatures are continuously monitored. When any switch temperatures exceed 170°C, the DOI output is put in Hi-Z until the temperature falls by 15°C. Connect a resistor (RLIM) from CLIM to GND to set the required current limit. The current is given by:

I_LIM = K x V_LIM / R_LIM

where, V_LIM = 1.21V and K = 35.6 x 10³. If no resistor is connected to CLIM (i.e., CLIM is kept floating) or RLIM is more than 440k, the ILIM is internally set to 1.1A (typ). If the RLIM resistor is less than 12.9k (typ), the output is turned off. CLIM is short-circuit protected.

Use the formulas below to validate the accuracy range

I_{LIM_MAX} = I_LIM x (1 + |I_{CLIM_HS_GE}|/100) + |I_{CLIM_HS_OE}|

I_{LIM_MIN} = I_LIM x (1 - |I_{CLIM_HS_GE}|/100) - |I_{CLIM_HS_OE}|

The low-side transistor has fixed-current limiting, when enabled in push-pull mode (PP driven high). The low-side driver limits current at 200mA (typ). The load current is actively controlled and the low-side switch only turns off if the driver temperature has fallen by the hysteresis value.

The MAX14914B features an overcurrent output (OV_CURR), which provides a diagnostic signal as soon as the load current exceeds the high-side driver set current limit in both high-side and push-pull DO modes (DI_EN = low and PP = x). When the high-side FET detects an overcurrent for a duration longer than 8μs, the OV_CURR open-drain signal becomes active low and remains low until the overcurrent condition disappears. The overcurrent condition also disappears every time the high-side switch turns off when a short-circuit condition exists and the FET turns off for thermal shutdown protection. Note that OV_CURR does not signal an overcurrent on the low-side driver in push-pull mode. The typical application circuit with the overcurrent signaling is shown in Figure 5.

Short circuits at the DOI output generates high transient current until the active current limiting kicks in. In order to protect the MAX14914_ against high currents that can be seen over an extended time, especially if the output is switching at a high rate into a short circuit, the MAX14914_ enters a protect mode. When the MAX14914_ detects that the DOI current is over 3x higher than the set current limit, the driver is switched to protect mode with reduced turn-on slew rate of the rising and falling edges for a duration of 4ms. The FAULT signal does not become active and the chip operates normally, but with reduced slew rate. If the cause for the short circuit is not removed, the protect mode will remain for an additional 4ms until the short circuit is removed.

When the V_DD supply voltage exceeds the OVLO threshold voltage of 42.2V (typ), for a time duration larger than 200μs, the high-side and low-side switches automatically turn off. They remain off until V_DD is reduced to below the threshold OVLO voltage minus hysteresis. When V_DD is above the OVLO threshold, the OV_VDD output is active.

When charging/discharging purely capacitive loads with a push-pull driver, the driver dissipates power that is proportional to the switching frequency. The power can be estimated by PD ~ C x V_DD² x f, where C is the load capacitance, V_DD is the supply voltage, and f is the switching frequency. For example, in an application with a 10nF load and 10kHz switching frequency, the driver dissipates 130mW at V_DD = 36V. Therefore, switching a higher capacitance can induce thermal shutdown and that limits the operational frequency.

The DOI pins can be pulled below ground potential when the high-side transistor is off. The MAX14914_ has an internal clamping diode from V_DD to DOI that limits the negative voltage excursion to (V_DD - 55V) typ. Turning off the current flowing in ground-connected inductive loads results in a negative voltage at the DOI pin limited to V_CL below V_DD by the internal clamping diodes.

The MAX14914_ features SafeDemag, meaning that there are no limits for load inductance that it can demagnetize, for load currents of up to 600mA. Turn-off of large inductive loads with currents larger than 600mA requires an external clamping diode, as shown in Figure 6. The clamping (breakdown) voltage of such diode needs to be less than V_CL: V_Z < V_CL. Ensure that the Zener diode is able to dissipate the energy.

The driver output (DOI) is monitored in both high-side and push-pull modes and corresponding logic level can be seen through the inversed DOI_LVL logic output. The threshold voltage for the DOI_LVL comparator is between 1.5V and 2.0V. This feature is useful for functional safety applications.

The MAX14914_ can operate as an industrial digital input. Drive the DI_EN pin high to enable digital input operation. The 2.3mA/7mA internal current sink on DIO is then enabled and the DOI_LVL logic output presents the inverse of the DOI logic, with threshold voltages compliant with IEC61131-2 Type 1, Type 2, or Type 3 levels. IN DI mode, the PP input allows selection between IEC Type 1/3 and Type 2 input characteristics. Set PP low for Type 1/3 compatibility and set PP high for Type 2 compatibility. In order to allow the DOI input voltage to go above the V_DD supply voltage and preventing race condition, an external Schottky diode can be placed in series with the V_DD supply, as shown in Figure 7. Alternatively, an external pMOS transistor can be placed in series with the 24V supply, as shown in Figure 8, to allow the DOI voltage to exceed V_DD. The gate of the pMOS can be driven by the open drain OV_VDD output (MAX14914 and MAX14914A only). When DI_EN = high, the OV_V_DD pin turns the pMOS off permanently. Therefore, V_DD is one forward diode voltage (of the pMOS) below the external 24V field supply, when the DOI voltage is less than the field supply voltage. The MAX14914_ is parasitically powered by the external DOI input, when the DOI voltage is higher than the V_DD supply. Note that the power dissipation increases strongly when Type 2 DI mode is selected (PP = high), particularly with high DOI input voltages due to the 7mA (typ) current sink. When the V_DOI voltage exceeds 42.5V (typ) the sink current is automatically decreased from 7mA (typ) to 2.3mA (typ) to reduce the power dissipation.