Applications Information

The PCB designer should follow some critical recommendations in order to get the best performance from the design.

● Keep the input/output traces as short as possible. Avoid using vias to make low-inductance paths for

the signals.

● Have a solid ground plane underneath the high-speed signal layer.

A suppressor/TVS diode should be used between V_DD and PGND to clamp positive-surge transients on the V_DD supply input and surges from DOI. The standoff voltage should be higher than the maximum operating voltage of the device while the breakdown voltage should be below 65V. As long field-supply cables can generate large voltage transients on the V_DD supply due to large dI/dt, it is recommended to add a large 10µF capacitor on V_DD at the point of field supply entry.

DOI is protected against ±2kV/42Ω surge pulses as per IEC61000-4-5. Thus, no external surge suppression is needed on DOI. A suppressor/TVS diode (SMBJ40A, for example) should be used between V_DD and PGND to clamp high-surge transients on the V_DD supply input and surges from DOI. The breakdown voltage of TVS should be higher than the maximum operating voltage of the equipment, while the maximum clamping voltage should be below 65V.

To insure that the DOI driver, configured for HS mode with the switch turned off, is not turned on during IEC61000-4-6 RF immunity testing, a 10nF capacitor should be applied between the DOI output and PGND. For PP mode a capacitor on DOI is not needed.

Reverse current flow into DOI pin in DO mode will heat up the device and can destroy it thermally. The allowed reverse current depends on V_DD, the ambient temperature and the thermal resistance. At 25°C ambient temperature the continuous reverse current into DOI pin should be limited to 250mA at V_DD = 40V and 400mA at V_DD = 24V. Using a pMOS transistor or a Schottky diode (as shown in Figure 7 and Figure 8) removes the reverse current flow path into the 24V field supply.