Applications Information

The AISG standard defines the maximum spectrum emission that all the OOK modulating devices must be compliant with. Such a spectrum is represented in Figure 15.

The MAX11947 is compliant with the emissions mask as shown in the AISG v3.0.0.10 standard, Figure 10.3.11.3-1.

An external 470pF capacitor connected between P_ and ground is recommended for compliance above 25MHz. See the Typical Application Circuit.

Description of the receive filter, bandwidth and how the min/max frequency points are tested.

The AISG standard (section 10.3.12) indicates a need for the receiver bandpass filter to remove the influence from any external CW signals. As a minimum, the device has two states it must reject: first, an extra carrier causing an ON signal when the intended carrier at 2.176MHz is at an OFF power level of -18dBm; second, an ON signal (with power ranging from -12dBm to +5dBm) does not indicate an OFF signal because of intermodulation distortion between the two CW signals.

[[AISG Selectivity no-ON Test Conditions]] shows the AISG Test conditions for the first state. The red blocks indicate the power and frequency range of the interfering CW signal: less than or equal to -13dBm power ranging anywhere from 9kHz up to 1.25MHz and 3.7MHz up to 12.75GHz plus the need to reject the Tx carrier signal at the maximum power expected for the ALD system.

The MAX11947 is verified at more stringent frequencies by expanding the low-side testing up to 1.5MHz (versus 1.25MHz) and the high-side testing down to 3.0MHz (versus 3.7MHz). These conditions are used to guaranteed the part does not indicate an ON condition (no-ON) when an interfering CW signal is within these bands. This device is tested for a forced-ON state with frequencies of the extra carrier set to 2.1MHz and 2.3MHz as shown in Figure 17. This verifies that the band-pass filter cutoff frequencies fall within the grey area on the plot.

Characterization of the filter shows the receiver only indicates an ON state when a carrier with a power over -12dBm falls between the typical frequencies of 1.7MHz and 2.7MHz.

Figure 18 depicts the AISG Test conditions for the second state where the receiver should always indicate an ON regardless of the presence of an interfering CW in the red test areas. This condition is not tested on the MAX11947.

The MAX11947 modem specifies several forms of crosstalk and isolation with two simple, required components: a 470pF shunt capacitor for transmitter spectral filtering and a 100nF series capacitor used to block any DC component on the RF feed line (which can range from 10V to 30V). Additional lowpass filtering can be added to each port to increase the port-to-port RF isolation as shown in Figure 19.

A simple RC low-pass filter was implemented in circuit simulation using a 6.18MHz pole with an R_LPF = to 50Ω and the C_LPF = 515pF. Each port on the MAX11947 evaluation kit has place holders for a three-pole RC filter. By default, the evaluation kit resistors have been shorted (0Ω resistors) and the capacitors are left unpopulated.

A typical communications channel between a base station master and a tower-mounted antenna line device (ALD) must meet the AISG specified transmitter ON level of +3dBm ±2dB and the OFF level of  ≤ -40dBm (section 10.3.11.2 of the AISG v3.0 standard and depicted in Figure 20). Likewise the modem receiver must meet the requirements of definitively indicating a carrier ON level between +5dBm and -12dBm, a carrier OFF level at any power less than -18dBm, and thus the receiver detection threshold must fall in a 6dB window at -15dBm ±3dB (section 10.3.12).

When the modem is used in an ALD system with a line splitter as noted in AISG v3.0 section 10.3.13, both the transmit and receive power levels may need to be adjusted to account for additional signal attenuation through the splitter. Similarly, when an ALD system includes a OOK bypass path, the transmit and receive signals may also be attenuated between the modem and the RF port (section 10.3.15 and depicted in [[AISG - OOK bypass]]).

To adjust for the attenuation behind the splitter, the MAX11947 has the ability to increase the transmitter output power as shown in Figure 22.

Similarly, attenuation behind the splitter can effectively shift the sensitivity threshold lower. The MAX11947 has the ability to lower the threshold level to accommodate the power lost through the splitter as shown in Figure 23.

The MAX11947 integrated AISG modem typically operates with an external crystal at 4x the 2.176MHz frequency, or 8.704MHz. The crystal is required to achieve the ±100ppm frequency stability specification of the AISG standard. A crystal with ±30ppm is recommended along with two 40pF (±10% tolerance) capacitors connected to ground as shown in Typical Application Circuit. The capacitors do not affect the oscillation frequency.

The modem can also operate without a crystal, by using a stable external clock source. The external clock should be connected to the XTAL1 pin and the XTAL2 pin on the modem should be connected to ground.

Clock Master/Slave Configuration

Multiple MAX11947 devices can share the same crystal by using the SYNCOUT pin. One device acts as a master and provides the 8.704MHz clock signal to the slave device(s). To configure a device as the clock master, set the OSCBUF bits in the CFG (0x00) register to a value of 0x1 or higher, this turns on the SYNCOUT signal. In the hardware, connect a 1kΩ pullup resistor to V_CC from the SYNCOUT pin of the master device. The external clock coming from the master feeds the XTAL1 pin of the slave device and the XTAL2 pin on the slave should be connected to ground. See Figure 24 for an example of the clock master/slave circuit.

If additional drive capability is needed for the SYNCOUT buffer, set the OSCBUF bits to 0x2 or 0x3 as appropriate. Additional daisy-chain configurations can be used if desired.

There are effectively two dwell times used in the MAX11947: one is used to maintain the DIR pin in a receive status until an AISG message has timed out and the other is used as part of the automatic port scanning feature. Both times are derived from the data rate (baud rate) that determines the period of a single OOK bit. This bit period is then used to define the fixed DIR pin dwell time as 16-bit periods.

For example, when running at the default 9600kbps NRZ data rate, the bit period is approximately 0.104ms and the DIR dwell time is approximately 1.667ms (approximately 16 x 0.104ms).

The port scanning feature provides the ability to manually index through the MUX ports or to use one of three dwell times (two preset and one custom). These scanning dwell times are 1x a bit period, 16x a bit period, or a user customized count of bit periods. The customized field defaults to a 81x multiplier but can be programmed by the user anywhere from 1x to 4096x the bit period.

The 81-bit period default is an estimate for the length of a ping message. In section 11.11.7 of the AISG v3.0 standard, the ping message is noted to contain a 1-word address, a control word, the FI, GI, and GL words, a 1-octet XID indicating the ping message, and the 4-octet primary ID—summing up to 10 words or 80 bits. Add in the stop and a ping message should be a total of 81 bits in length.

Using the same example of the default 9600kbps data rate above, this custom count of 81x bit periods would equate to 8.438ms, less than the 20ms allocated to receive a Ping message and noticeably less than the 40ms timeout period.

Normal modem communication occurs through physical connections to the classic RS-485 modem pins: TXIN, DIR, and RXOUT. However, having all three of these pins represented by four bits in the SPI registers could allow a user to not only configure the MAX11947, but also control of the modem functions through just the serial interface.

A typical transmission would occur when the DIR is indicating a transmit-ready state that is represented by a logic-low (0V) level at the DIR pin and a 0 value of the DIR bit in the STATUS register (0x7). The modem begins transmitting the OOK carrier when a logic-low signal (0V) is detected at the TXIN pin or if the TX_ON bit is set to 1 in the CFG register (0x0). The TXACTIVE bit in the STATUS register (0x7) indicates the OOK status of the PA. That is, the TXACTIVE bit is set to 1 if the TX_ON bit is also set to 1 or the TXIN pin is set to logic-low.

When an incoming OOK signal is detected, the MAX11947 asserts the DIR output pin to a logic-high (V_L) level. This same status can be noted by reading a 1 value from the DIR bit in the STATUS register (0x7). After the DIR pin and DIR bit have been set to 1, the RXOUT pin indicates the OOK carrier status by setting the RXOUT pin to logic-low (0V) when the receiver detects an ON carrier or sets the pin to logic-high (V_L) when the carrier is OFF (not detected). The RXOUT field in the STATUS register (0x7) indicates the same: the bit is cleared to 0 when the carrier is detected and set to 1 when the carrier is not detected.

Allowing for the slowest maximum clock rate on the serial interface of 8MHz, plus the requisite 2 words (16 bits) needed to write or read the registers, the fastest SPI interfacing would allow for a maximum of 500k reads per second of the STATUS register. This equates to about 52 samples of the register per each OOK data bit when receiving at a 9600kbps NRZ data rate.

When interfacing the MAX11947 to a microcontroller, the user can trigger an interrupt from the DIR pin rising edge, then initiate a continuous polling sequence of the STATUS register. This  allows the user to sample the DIR bit and RXOUT bit values at a rate of 52 readings per OOK bit to allow for an easy decode of the message. After the receive cycle is complete, the SPI interface can then be used to poll the DIR bit for status of the AISG channel. After confirming the channel is transmit ready (DIR bit is 0), the interface can set and clear the TX_ON bit to send an OOK transmission.