Pin Specifications

Pin Configuration DS28S60
PIN NAME FUNCTION
Pin Description
POWER
1 CEXT External Capacitor. Connect to ground through a 1µF external ceramic chip capacitor. Place the capacitor as close as possible to the CEXT pin. No other components should be connected to the CEXT pin.
6 GND Digital Ground. Connect directly to the ground plane.
7 PDWN Power Down. Controls the power state of the DS28S60. Setting this pin to GND places the DS28S60 into power-down mode. In power-down mode, all volatile/ephemeral registers and data are erased. Set this pin high prior to communicating with the device. This pin should remain in a high state for the duration of any cryptography computations and as long as any ephemeral data/keys are required by the host application.
12 VDD Supply Voltage. Connect to the external power supply for the DS28S60. Bypass to ground with a 4.7μF and 0.1μF capacitor in parallel as close as possible to the VDD pin.
EP Exposed Pad. Solder evenly to the board's ground plane for proper operation. Refer to Application Note 3273: Exposed Pads: A Brief Introduction for additional information.
SPI SLAVE
2 SPIS_SCK Slave Clock (SCK). The SPI clock input from an external SPI master controller.
3 SPIS_MOSI Master Out Slave In (MOSI). This is the SPI data input line from the SPI master.
4 SPIS_MISO Master In Slave Out (MISO). This is the SPI data output line for data going from the DS28S60 to an external SPI master.
5 SPIS_SS Slave Select (SS). An input from a SPI master to select the DS28S60 for communication.
8–11 DNC Do Not Connect. Leave unconnected.