Package Information

Package Information
4 WLP
Package Code Z41A1+1
Outline Number 21-100548
Land Pattern Number Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA) 95.15°C/W
Junction to Case (θJC) N/A
6 TSOC
Package Code D6+1
Outline Number 21-0382
Land Pattern Number 90-0321
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θJA) 166°C/W
Junction to Case (θJC) 37°C/W
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA) 126.7°C/W
Junction to Case (θJC) 37°C/W

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

data-opDS28E30X%2BU
data-opDS28E30X%2BT
data-opDS28E30P%2B
data-opDS28E30P%2BT
Not Connected1-Wire I/OGround Reference. Connect directly to the ground plane.Input for External CapacitorInput for External Capacitor