| Package Code | Z80D1+1 |
| Outline Number | 21-100497 |
| Land Pattern Number | Refer to Application Note 1891 |
| Thermal Resistance, Four-Layer Board: | |
| Junction to Ambient (θJA) | 87.71C°/W |
| Junction to Case (θJC) | N/A |
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
data-opDS2488X%2BT
data-opDS2488X%2BU
General-Purpose Input/Output A.General-Purpose Input/Output B.Voltage Low. This is the low-power supply input. Needed for IOB, PIOA, PIOB, and TOKEN pin operation.1-Wire Input/Output A. Accessible when the TOKEN pin is logic low. This pin can also be configured in a logic pass-through mode to IOB pin. IOA parasite power required for CD/PIOC pin operation.Token. This pin indicates which 1-Wire side gets the communication token. Logic low stands for IOA side, while logic high for IOB side. It outputs a low-frequency clock (TOKF) while in pass-through mode.Charger Disable (Default) or General-Purpose Input/Output (SEL bit is set to one). Charger disable is floating (i.e., non-conducting) when the IOA pin is nominally below 4V. Otherwise, charger disable is actively low to enable the charger through a transistor when IOA is above 4V.1-Wire Input/Output B. This pin can also be configured in a logic pass-through mode to IOA pin.Ground.